Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753199AbdCNUzV (ORCPT ); Tue, 14 Mar 2017 16:55:21 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57044 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753163AbdCNUzS (ORCPT ); Tue, 14 Mar 2017 16:55:18 -0400 From: Eddie James To: linux@roeck-us.net Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, jdelvare@suse.com, corbet@lwn.net, mark.rutland@arm.com, robh+dt@kernel.org, wsa@the-dreams.de, andrew@aj.id.au, benh@kernel.crashing.org, joel@jms.id.au, "Edward A. James" Subject: [PATCH linux v9 0/5] drivers: hwmon: Add On-Chip Controller driver Date: Tue, 14 Mar 2017 15:55:01 -0500 X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 x-cbid: 17031420-2213-0000-0000-0000015DB37D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006782; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000206; SDB=6.00833846; UDB=6.00409429; IPR=6.00611504; BA=6.00005210; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00014648; XFM=3.00000013; UTC=2017-03-14 20:55:14 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17031420-2214-0000-0000-000054AA58D3 Message-Id: <1489524906-19411-1-git-send-email-eajames@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-03-14_11:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=13 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703140160 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3123 Lines: 65 From: "Edward A. James" This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring. The driver provides an interface on a BMC to poll OCC sensor data, set user power caps, and perform some basic OCC error handling. It interfaces with userspace through hwmon. The driver is currently functional only for the OCC on POWER8 chips. Communicating with the POWER9 OCC requries FSI support. since v8: * drop P9 sensors patch. This patch was mainly included to demonstrate why we abstracted out the sensor-specific code into the occ_p8 functions. However, since we haven't submitted the transfer protocol to the OCC for P9 yet, we shouldn't submit this unused P9 code yet. * fix string access in hwmon read_string() function. Thanks Guenter. * change parameter to const char ** in read_string() function to match upcoming hwmon code. Edward A. James (5): hwmon: Add core On-Chip Controller support for POWER CPUs hwmon: occ: Add sysfs interface hwmon: occ: Add I2C transport implementation for SCOM operations hwmon: occ: Add callbacks for parsing P8 OCC datastructures hwmon: occ: Add hwmon implementation for the P8 OCC Documentation/devicetree/bindings/hwmon/occ.txt | 13 + Documentation/hwmon/occ | 113 ++++++ MAINTAINERS | 7 + drivers/hwmon/Kconfig | 2 + drivers/hwmon/Makefile | 1 + drivers/hwmon/occ/Kconfig | 28 ++ drivers/hwmon/occ/Makefile | 3 + drivers/hwmon/occ/occ.c | 440 ++++++++++++++++++++++++ drivers/hwmon/occ/occ.h | 77 +++++ drivers/hwmon/occ/occ_p8.c | 256 ++++++++++++++ drivers/hwmon/occ/occ_p8.h | 25 ++ drivers/hwmon/occ/occ_p8_i2c.c | 99 ++++++ drivers/hwmon/occ/occ_scom_i2c.c | 69 ++++ drivers/hwmon/occ/occ_scom_i2c.h | 21 ++ drivers/hwmon/occ/occ_sysfs.c | 253 ++++++++++++++ drivers/hwmon/occ/occ_sysfs.h | 25 ++ drivers/hwmon/occ/scom.h | 42 +++ 17 files changed, 1474 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt create mode 100644 Documentation/hwmon/occ create mode 100644 drivers/hwmon/occ/Kconfig create mode 100644 drivers/hwmon/occ/Makefile create mode 100644 drivers/hwmon/occ/occ.c create mode 100644 drivers/hwmon/occ/occ.h create mode 100644 drivers/hwmon/occ/occ_p8.c create mode 100644 drivers/hwmon/occ/occ_p8.h create mode 100644 drivers/hwmon/occ/occ_p8_i2c.c create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h create mode 100644 drivers/hwmon/occ/occ_sysfs.c create mode 100644 drivers/hwmon/occ/occ_sysfs.h create mode 100644 drivers/hwmon/occ/scom.h -- 1.8.3.1