Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752581AbdCOJDl convert rfc822-to-8bit (ORCPT ); Wed, 15 Mar 2017 05:03:41 -0400 Received: from gloria.sntech.de ([95.129.55.99]:43212 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751310AbdCOJDi (ORCPT ); Wed, 15 Mar 2017 05:03:38 -0400 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Chris Zhong Cc: linux-rockchip@lists.infradead.org, Mark Yao , David Airlie , Rob Herring , Mark Rutland , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/3] dt-bindings: add the grf clock for dw-mipi-dsi Date: Wed, 15 Mar 2017 10:03:15 +0100 Message-ID: <3304582.Whtjx7Nypf@diego> User-Agent: KMail/5.2.3 (Linux/4.8.0-2-amd64; KDE/5.27.0; x86_64; ; ) In-Reply-To: <1489567352-3333-1-git-send-email-zyw@rock-chips.com> References: <1489567352-3333-1-git-send-email-zyw@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1317 Lines: 33 Am Mittwoch, 15. M?rz 2017, 16:42:30 CET schrieb Chris Zhong: > For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, > add the description for this clock. > > Signed-off-by: Chris Zhong > --- > > .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 > +- 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git > a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t > xt > b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t > xt index 188f6f7..7e17a60 100644 > --- > a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t > xt +++ > b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t > xt @@ -10,7 +10,7 @@ Required properties: > - interrupts: Represent the controller's interrupt to the CPU(s). > - clocks, clock-names: Phandles to the controller's pll reference > clock(ref) and APB clock(pclk). For RK3399, a phy config clock > - (phy_cfg) is additional required. As described in [1]. > + (phy_cfg) and a grf clock(grf) are additional required. As described in > [1]. your "grf" clock is optional, as it is not present on all socs (like the rk3288) so should probably move to a separate section and not be in the required properties Heiko