Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752610AbdCOJzz (ORCPT ); Wed, 15 Mar 2017 05:55:55 -0400 Received: from regular1.263xmail.com ([211.150.99.138]:52987 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751962AbdCOJzx (ORCPT ); Wed, 15 Mar 2017 05:55:53 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zyw@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: zyw@rock-chips.com X-UNIQUE-TAG: <0dc48aee240f1a3402a4ec454586df3b> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 1/3] dt-bindings: add the grf clock for dw-mipi-dsi To: =?UTF-8?Q?Heiko_St=c3=bcbner?= References: <1489567352-3333-1-git-send-email-zyw@rock-chips.com> <3304582.Whtjx7Nypf@diego> Cc: linux-rockchip@lists.infradead.org, Mark Yao , David Airlie , Rob Herring , Mark Rutland , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org From: Chris Zhong Message-ID: <58C90F8B.7070102@rock-chips.com> Date: Wed, 15 Mar 2017 17:55:23 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <3304582.Whtjx7Nypf@diego> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1607 Lines: 45 Hi Heiko On 03/15/2017 05:03 PM, Heiko St?bner wrote: > Am Mittwoch, 15. M?rz 2017, 16:42:30 CET schrieb Chris Zhong: >> For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, >> add the description for this clock. >> >> Signed-off-by: Chris Zhong >> --- >> >> .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 >> +- 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git >> a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t >> xt >> b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t >> xt index 188f6f7..7e17a60 100644 >> --- >> a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t >> xt +++ >> b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.t >> xt @@ -10,7 +10,7 @@ Required properties: >> - interrupts: Represent the controller's interrupt to the CPU(s). >> - clocks, clock-names: Phandles to the controller's pll reference >> clock(ref) and APB clock(pclk). For RK3399, a phy config clock >> - (phy_cfg) is additional required. As described in [1]. >> + (phy_cfg) and a grf clock(grf) are additional required. As described in >> [1]. > your "grf" clock is optional, as it is not present on all socs (like the > rk3288) so should probably move to a separate section and not be in the > required properties For RK3399, the grf clock is required, according to the advice provided by rob[0], put it into "required properties " is better. [0] https://patchwork.kernel.org/patch/9220187/ > > Heiko > > > -- Chris Zhong