Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751700AbdCPGfV (ORCPT ); Thu, 16 Mar 2017 02:35:21 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34421 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751342AbdCPGeR (ORCPT ); Thu, 16 Mar 2017 02:34:17 -0400 From: Ralph Sennhauser To: linux-gpio@vger.kernel.org Cc: Ralph Sennhauser , Linus Walleij , Alexandre Courbot , linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/6] gpio: mvebu: start multiline block comments with blank line Date: Thu, 16 Mar 2017 07:33:57 +0100 Message-Id: <20170316063402.8667-3-ralph.sennhauser@gmail.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170316063402.8667-1-ralph.sennhauser@gmail.com> References: <20170316063402.8667-1-ralph.sennhauser@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1231 Lines: 35 While this isn't an issue according to checkpatch two styles are used. Add a blank line to the block comments missing a blank line at the start so multiline block comments look the same across the file. Signed-off-by: Ralph Sennhauser --- drivers/gpio/gpio-mvebu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index a2351f3..80b1d52 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -788,7 +788,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) goto err_domain; } - /* NOTE: The common accessors cannot be used because of the percpu + /* + * NOTE: The common accessors cannot be used because of the percpu * access to the mask registers */ gc = irq_get_domain_generic_chip(mvchip->domain, 0); @@ -809,7 +810,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) ct->handler = handle_edge_irq; ct->chip.name = mvchip->chip.label; - /* Setup the interrupt handlers. Each chip can have up to 4 + /* + * Setup the interrupt handlers. Each chip can have up to 4 * interrupt handlers, with each handler dealing with 8 GPIO * pins. */ -- 2.10.2