Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752460AbdCPNsD (ORCPT ); Thu, 16 Mar 2017 09:48:03 -0400 Received: from mail-by2nam01on0059.outbound.protection.outlook.com ([104.47.34.59]:54272 "EHLO NAM01-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751741AbdCPNsB (ORCPT ); Thu, 16 Mar 2017 09:48:01 -0400 Authentication-Results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=cavium.com; Date: Thu, 16 Mar 2017 14:31:54 +0100 From: Robert Richter To: Marc Zyngier Cc: Shanker Donthineni , Thomas Gleixner , Jason Cooper , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 8/8] irqchip, gicv3-its, cma: Use CMA for allocation of large device tables Message-ID: <20170316133154.GA16822@rric.localdomain> References: <20170306125739.19445-1-rrichter@cavium.com> <20170306125739.19445-9-rrichter@cavium.com> <3c462655-fb2c-ede7-1dc0-ca5c7f64904f@codeaurora.org> <20170315183734.GW16822@rric.localdomain> <9b492795-3759-801e-c77d-e74e86c814d1@arm.com> MIME-Version: 1.0 Content-Type: text/plain; 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> >>> } > >>> > >>> + /* Setup dma_ops for dmam_alloc_coherent() */ > >>> + arch_setup_dma_ops(&its->dev, 0, 0, NULL, true); > >>> + > > > >> Why you are hard-coding DMA coherent property to true here ? It > >> breaks the MSI(x) functionally on systems where ITS hardware doesn't > >> support coherency. > > > > Aren't current ITS tables coherent only? > > No, there is no such guarantee. Actually, there is strictly no need for > coherency, as the ITS tables are only written by the ITS itself, for its > own purpose. So no need to change that, right? Thanks, -Robert