Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753122AbdCQDpZ (ORCPT ); Thu, 16 Mar 2017 23:45:25 -0400 Received: from regular1.263xmail.com ([211.150.99.133]:57608 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752353AbdCQDpS (ORCPT ); Thu, 16 Mar 2017 23:45:18 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: jay.xu@rock-chips.com X-FST-TO: robh+dt@kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: jay.xu@rock-chips.com X-UNIQUE-TAG: <43647c3b0eb23f48d07dd5ae66fc7046> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Jianqun Xu To: robh+dt@kernel.org, heiko@sntech.de, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jianqun Xu Subject: [PATCH v2 2/3] arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs Date: Fri, 17 Mar 2017 11:32:43 +0800 Message-Id: <1489721564-32203-3-git-send-email-jay.xu@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1489721564-32203-1-git-send-email-jay.xu@rock-chips.com> References: <1489721564-32203-1-git-send-email-jay.xu@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2107 Lines: 71 I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip, add nodes to support them. Signed-off-by: Jianqun Xu --- changes since v1: - fix compile error caused by dumplicate label 'i2s1' arch/arm64/boot/dts/rockchip/rk3368.dtsi | 38 ++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index c9be1b2..74fbcc2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -715,6 +715,30 @@ interrupts = ; }; + i2s_2ch: i2s-2ch@ff890000 { + compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s"; + reg = <0x0 0xff890000 0x0 0x1000>; + interrupts = ; + dmas = <&dmac_bus 6>, <&dmac_bus 7>; + dma-names = "tx", "rx"; + clock-names = "i2s_clk", "i2s_hclk"; + clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>; + status = "disabled"; + }; + + i2s_8ch: i2s-8ch@ff898000 { + compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s"; + reg = <0x0 0xff898000 0x0 0x1000>; + interrupts = ; + dmas = <&dmac_bus 0>, <&dmac_bus 1>; + dma-names = "tx", "rx"; + clock-names = "i2s_clk", "i2s_hclk"; + clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_bus>; + status = "disabled"; + }; + gic: interrupt-controller@ffb71000 { compatible = "arm,gic-400"; interrupt-controller; @@ -917,6 +941,20 @@ }; }; + i2s { + i2s_8ch_bus: i2s-8ch-bus { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>, + <2 13 RK_FUNC_1 &pcfg_pull_none>, + <2 14 RK_FUNC_1 &pcfg_pull_none>, + <2 15 RK_FUNC_1 &pcfg_pull_none>, + <2 16 RK_FUNC_1 &pcfg_pull_none>, + <2 17 RK_FUNC_1 &pcfg_pull_none>, + <2 18 RK_FUNC_1 &pcfg_pull_none>, + <2 19 RK_FUNC_1 &pcfg_pull_none>, + <2 20 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + pwm0 { pwm0_pin: pwm0-pin { rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>; -- 1.9.1