Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751465AbdCQPGK (ORCPT ); Fri, 17 Mar 2017 11:06:10 -0400 Received: from mail-pg0-f47.google.com ([74.125.83.47]:36186 "EHLO mail-pg0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751169AbdCQPGF (ORCPT ); Fri, 17 Mar 2017 11:06:05 -0400 From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Mathieu Poirier , Leo Yan , Guodong Xu , John Stultz , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, mike.leach@linaro.org, Suzuki.Poulose@arm.com, sudeep.holla@arm.com Subject: [PATCH v4 7/7] arm64: dts: qcom: msm8916: Add debug unit Date: Fri, 17 Mar 2017 23:02:23 +0800 Message-Id: <1489762943-25849-8-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> References: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1410 Lines: 53 Add debug unit on Qualcomm msm8916 based platforms, including the DragonBoard 410c board. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 68a8e67..3af814b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1104,6 +1104,38 @@ }; }; + debug@850000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x850000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU0>; + }; + + debug@852000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x852000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU1>; + }; + + debug@854000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x854000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU2>; + }; + + debug@856000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x856000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU3>; + }; + etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>; -- 2.7.4