Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755123AbdCTVmQ (ORCPT ); Mon, 20 Mar 2017 17:42:16 -0400 Received: from mail-oi0-f67.google.com ([209.85.218.67]:35328 "EHLO mail-oi0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752673AbdCTVmN (ORCPT ); Mon, 20 Mar 2017 17:42:13 -0400 MIME-Version: 1.0 In-Reply-To: References: <20170310132507.32025-1-jglauber@cavium.com> <20170310132507.32025-5-jglauber@cavium.com> From: Arnd Bergmann Date: Mon, 20 Mar 2017 21:34:28 +0100 X-Google-Sender-Auth: WNF7W-I0XvGdW438MioUa2yhITE Message-ID: Subject: Re: [PATCH v12 4/9] mmc: cavium: Work-around hardware bug on cn6xxx and cnf7xxx To: Ulf Hansson Cc: Jan Glauber , "linux-mmc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , David Daney , "Steven J . Hill" , David Daney Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1386 Lines: 35 On Fri, Mar 17, 2017 at 3:13 PM, Ulf Hansson wrote: > On 10 March 2017 at 14:25, Jan Glauber wrote: >> Prevent data corruption on cn6xxx and cnf7xxx. >> Due to an imperfection in the design of the MMC bus hardware, >> + */ >> +void l2c_unlock_mem_region(u64 start, u64 len) >> +{ >> + u64 end; >> + >> + /* Round start/end to cache line boundaries */ >> + end = ALIGN(start + len - 1, CVMX_CACHE_LINE_SIZE); >> + start = ALIGN(start, CVMX_CACHE_LINE_SIZE); >> + >> + while (start <= end) { >> + l2c_unlock_line(start); >> + start += CVMX_CACHE_LINE_SIZE; >> + } >> +} >> +EXPORT_SYMBOL_GPL(l2c_unlock_mem_region); > > It seems like we should be able to implement these functions in the > octeon mmc driver, instead of having to export some SoC specific APIs. > You only need to figure out how to find the correct CACHE_LINE_SIZE, > but that should be possible to fix. > > My point is really that we should avoid exporting SoC specific APIs > which shall be called from drivers. This is old fashion. Right, we wouldn't do this on arm64 either, so it's better not to introduce it for mips now when you want to have an arm64 version next. You should also try to have every driver enabled for CONFIG_COMPILE_TEST, which doesn't work with architecture specific hacks. Arnd