Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757315AbdCUMvS (ORCPT ); Tue, 21 Mar 2017 08:51:18 -0400 Received: from mx0a-001ae601.pphosted.com ([67.231.149.25]:60835 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756389AbdCUMvR (ORCPT ); Tue, 21 Mar 2017 08:51:17 -0400 Authentication-Results: ppops.net; spf=none smtp.mailfrom=ckeepax@opensource.wolfsonmicro.com Date: Tue, 21 Mar 2017 12:52:07 +0000 From: Charles Keepax To: Daniel Baluta CC: , , , , , , , , Subject: Re: [PATCH v2 2/2] ASoC: codec: wm8960: Relax bit clock computation Message-ID: <20170321125207.GX6986@localhost.localdomain> References: <1490090976-25877-1-git-send-email-daniel.baluta@nxp.com> <1490090976-25877-3-git-send-email-daniel.baluta@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1490090976-25877-3-git-send-email-daniel.baluta@nxp.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703210113 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1329 Lines: 33 On Tue, Mar 21, 2017 at 12:09:36PM +0200, Daniel Baluta wrote: > WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8 > clocking register (See WM8960 datasheet, page 71). > > There are use cases, like this: > aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm > > where no BCLKDIV applied to sysclock can give us the exact requested > bitclk, so driver fails to configure clocking and aplay fails to run. > > Fix this by relaxing bitclk computation, so that when no exact value > can be derived from sysclk pick the closest value greater than > expected bitclk. > > Suggested-by: Charles Keepax > Signed-off-by: Daniel Baluta > --- > Changes since v1: > * use a marker to check if a match is found > * didn't removed PLL as Charles suggested because there is > a special PLL mode which explictly uses PLL. We could start > a discussion on not using PLL when deriving bitclk, but this > is to be done in another patch. > Could you elaborate on this a little more am I not sure I follow 100%? There is a mode which explictly requires the PLL to be used (WM8960_SYSCLK_PLL) but in that case your wm8960_configure_sysclk code will not be called so I don't see what is causing that to have an effect on this patch? Thanks, Charles