Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933357AbdCUUWX (ORCPT ); Tue, 21 Mar 2017 16:22:23 -0400 Received: from mail-by2nam03on0052.outbound.protection.outlook.com ([104.47.42.52]:11488 "EHLO NAM03-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757233AbdCUUWU (ORCPT ); Tue, 21 Mar 2017 16:22:20 -0400 Authentication-Results: cavium.com; dkim=none (message not signed) header.d=none;cavium.com; dmarc=none action=none header.from=caviumnetworks.com; Subject: Re: [PATCH v12 4/9] mmc: cavium: Work-around hardware bug on cn6xxx and cnf7xxx To: Arnd Bergmann References: <20170310132507.32025-1-jglauber@cavium.com> <20170310132507.32025-5-jglauber@cavium.com> <6dc8a2a3-ca79-745a-c716-2188319b9378@caviumnetworks.com> <67481a9f-f7b5-4ec0-22cc-f6e019dc131e@caviumnetworks.com> Cc: Ulf Hansson , Jan Glauber , "linux-mmc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Steven J . Hill" , David Daney From: David Daney Message-ID: <79a1e294-797d-8b1f-0dcd-129df268c089@caviumnetworks.com> Date: Tue, 21 Mar 2017 13:22:05 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [50.233.148.156] X-ClientProxiedBy: BY2PR07CA060.namprd07.prod.outlook.com (10.141.251.35) To SN1PR07MB2431.namprd07.prod.outlook.com (10.169.127.143) X-MS-Office365-Filtering-Correlation-Id: e4f0e93f-5b0a-463b-dc17-08d47097f846 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001);SRVR:SN1PR07MB2431; X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2431;3:z7kEhuwov7r78+nVxOuET+Q8c4oM+1jzv+GXc9j3Q2oi9WWo9EOknayNLlFqQZoDYSMUCNKCXjtkhT/VlFcQbLe0RV4BOsVrNF2f5fOLo8gsIi5yCyCEcwtIr0gSVCZgKeIL1Ntq9S9aF+DK35ia3zzKcauIqystm62LJlrf0s2VQ8kq0rm5ybZEl2lgl33Sgx+t8j//N3Mehxi6XCcrkdwI5pEchREBywK6JPNns2h53D8OvPp5mC6nKK7hXS2f2kVk2kTjBuJkZx8WtJOGTQ==;25:yOM8EE+E4sO7wLYIq8A0awd0xEhudyuVLKhgE3iT1haha8tVApQoTbs4hPsSnN3zzaPlsMqufiiHDRooAEJg0+aP3LWncx51/BTkrbB4KF4QSeU//Mr31ruM6l023LqndK8alngKMcOZ0+qH5VIqnhdKaDyJpE7Nn/PtUrprkiHzspZXQHhLsCRKynMfcE//6amwQsgkb9e2Q7KO12b0BHyEYJETSuw+F0uKEGFEF7v8aaCFx9wjGKvNPJV8P9qDaaIcQeL08n+aQMnp47Rc4Ei3FciOjqUQIjAg0jGWJGkTz9q9oUPCkSL2t5CU2kdDIBrvn6ZfegotKecyOg9QxYxxkl1NoT8Xs0mWBSyQqMJ1zagZZRMG+U2a+q71A8T0MCh/hQZJxYQSuQ+Oyt8r/BSXpRNRO3aii2o5N2uZIEe7snIrNyaR9Y03OlKFfw7yM9WBEFVkO3QKlf/EBrNOxw== X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2431;31:1F01NdU5Vuiy4XqDDNNjijRjQxVMq38EOld1uUcbB3oRupMllDi+RHzDnrs7tNursT+aUsvDHPeIRQ1JpDhMMC8brFI9VuP0WPALxT9hAo4DBt3BHQjB3OBhjjPEnkqTWVuSQT25awWARYjqUINOKZPWXNWnT7PswQRKqkCBUoHyafzXeO4ZBMpd0cmMtITRF7oh3ubwr/Nak6ogvHWW6TTWRaWJl0zKVzmjdTP9bZw=;20:xx8CJNHO+2azWh/Ej76PVmIfm4+2eqz44xSmFBuJOMNjsYEIn4BbBv0G3Wkh73xkfcmr3WOMDKhOB8/Rbp6CZj4ungm1TdtZaepxSygHth0X0D79ytJiBogXTjeB4/0DviJS++B6e/1CK5aoJCHyPbjFzubWS3a+qbUAUhwd6imPVAhP5YX9Sla2B7XO6zE1/Xb8ZFK0vSga34StyiPzHjreLaAUDAKwkVbi1Eox0H5kD43ASihTOWsj6Ca0l4VvOeeSRLUcD5gz1V7WYKKYA3bDwgX4BRVW23g8hsqOwNXbcF/k1sk/O7Kz5OmLj17LDs6WB8APBxDniBnE/q3V1CYmx8oKT/PpjEwHgw3BEQpF4/xy6lqII7XxLV0hZ6VLzvlAz235Bq5JOiquVAVEg5N9OLVxDPGgPEXqDlv5gG7CsAQZPPMrUT3r+zGHMuwXdqZoV2FQV4Iw8fYKi4y2swLAMG8XSxgz90A07PNV5yFK8iXy2ZnX4QLiCj4KUTdmkwNoXBx8vI/hRbt96Vkvz5/LO9wPlAVplgimiDj6q6aIMxC47UwHbXZUXpoWLuC9jA6rnz3b15Lj1tw2Qdgoz4q3zfn0AbNoBV4DKo68YGc= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; 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This is old fashion. >>>> >>>> >>>> >>>> Some people find it objectionable to see 1-off architecture specific >>>> in-line >>>> asm in a driver file, but I agree that putting it as close to the user as >>>> possible makes sense. >>> >>> >>> The proper solution might be to create an architecture independent >>> interface >>> for it, what it is that the function does. Can you explain what the >>> purpose >>> of locking/unlocking the cache line for MMC is? Is this something that >>> could be done more generally in the dma_map_ops implementation? >> >> >> It is a 1-off erratum workaround that is only needed on fewer than five >> models/revisions of a mips64 based SoC family. As such, creating a general >> purpose, architecture independent, framework is clearly not the proper >> approach. > > If this is just for maintaining coherency of the DMA operation inbetween, > then there is already a generic API for that, which the driver calls. > Adding the workaround into octeon_dma_map_sg() would be a way > to abstract the platform erratum from the driver. > Either I am bad at explaining things, or you are not reading what I wrote. These are two facts about the bug: 1) The bug has nothing to do with coherency management, so hacking something into dma_map* is the wrong thing to do. 2) The bug effects exactly one device, so hacking something into common code that is used by other devices is the wrong thing to do. Suggesting that we use an alternate set of facts, although an interesting exercise, doesn't get us closer to answering the question of which source code file should contain the code. This is one opinion about the bug: 1) The bug is in the device, not the "platform", so putting the workaround code in the driver for the device may be the cleanest approach. David Daney