Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758951AbdCVKAe (ORCPT ); Wed, 22 Mar 2017 06:00:34 -0400 Received: from mail-dm3nam03on0089.outbound.protection.outlook.com ([104.47.41.89]:12736 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758632AbdCVKAZ (ORCPT ); Wed, 22 Mar 2017 06:00:25 -0400 Authentication-Results: caviumnetworks.com; dkim=none (message not signed) header.d=none;caviumnetworks.com; dmarc=none action=none header.from=caviumnetworks.com; Date: Wed, 22 Mar 2017 11:00:08 +0100 From: Jan Glauber To: David Daney Cc: Arnd Bergmann , Ulf Hansson , "linux-mmc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Steven J . Hill" , David Daney Subject: Re: [PATCH v12 4/9] mmc: cavium: Work-around hardware bug on cn6xxx and cnf7xxx Message-ID: <20170322100008.GA2869@hardcore> References: <20170310132507.32025-1-jglauber@cavium.com> <20170310132507.32025-5-jglauber@cavium.com> <6dc8a2a3-ca79-745a-c716-2188319b9378@caviumnetworks.com> <67481a9f-f7b5-4ec0-22cc-f6e019dc131e@caviumnetworks.com> <79a1e294-797d-8b1f-0dcd-129df268c089@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <79a1e294-797d-8b1f-0dcd-129df268c089@caviumnetworks.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Originating-IP: [46.223.159.60] X-ClientProxiedBy: VI1PR09CA0082.eurprd09.prod.outlook.com (10.174.49.154) To SN2PR07MB2592.namprd07.prod.outlook.com (10.167.15.22) X-MS-Office365-Filtering-Correlation-Id: 9a37762d-7dd9-45ac-6211-08d4710a3f38 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001);SRVR:SN2PR07MB2592; X-Microsoft-Exchange-Diagnostics: 1;SN2PR07MB2592;3:+jD9bVw87A0eSm71nOoEsTM8FuJS7vAcPBzFXshOqLbTTutOoa696prTBWN/5yt8axEwLU3/fJuAnGyjQQpYcgX7xsGifK0IH2jflRKPyeYXTvtSfK1kFIiihfiatIt57bauR6FP6Dw7qQDcRZWi7brYoL/9RXMSjPddFySsRZNacCYCE5acMwfu9j5S+oKS52SYWec1A0iS2dX3gCz7P9+jwzzU6x/LfYac8oZwd9tvv4gW42DlXJDqmvGjcRWiuewxnSPBwP49USWawQRMPA==;25:vdomgUTTz/I9BXkIs9jj6yJfDGiJ2WKUG/8Ales9WzQfQ0tHP7mGZ12JxsVTIUif6yXC/RpMaIXt2CGgOIpNtiOxBlLwJ+n9fu69gs57M0tQNp0R3gGHvt3nFEqBJXtPmpmQ7egsoHyKeqNFdXnwRH2deoOMO67wQqWSB9v/pm46yXZ/quucc0PVlQP6Ao2ddfqd0MZZ82ZzE40df36S97H/vsaFdip2v52bZ57TKaytdL6Fy9f08cUGoxRRc3g3kOs5fFfVoVwlkG5uHFFvxB3LdfaEVNascAszOWfqoZZngaGy4t+mKP+sFGOnsnkYV8QllY+kVAJ50PLGByA2A5VBHeE0l7kKLW0gkZz7K2GDyPmieYL/7PQVxwwWEyXgn+RN3u5vgPdHy22AWCJZhunjv51UdliIrHe2zXxrJOhNp76boQuRfQ1AkBTWOYraGAlrUd3b9Efuu/Hp9MfYCw== X-Microsoft-Exchange-Diagnostics: 1;SN2PR07MB2592;31:Pm9HVM5w5lmTQC1Cd5oaF+iAQ2xmVPjpUIi4P8rYJSl4StTw09xq2R1K7cEjvSnv9FJdZwBfZ8p/z2y0t2oHFIgVcFSMdYg8+cXw4hTbGNLUChb/Bmg8XjSwcWyXuwicmB16zwhHbo9934JkMxUHBV71390W2yAKdnnKSHEjtYTwb1N93Ahhgcj5o93olScvBuOfLfy1hWH1HYpRYbkfYUGMcCwUxYRK1vVKZ2pv3IrEUJ2umKTu/TQpHc0h1ht5;20:kyAVz2EBCGZCRtjy9dVdsVFZgnSJzTW3lSvfOzdPsb0QHpiVbM74T3C/l1sjnWmsF6cqe6kgv6FOXLLkCJfquL2Veb4OHZKe1Hp9zMdC0Vo22oDY5pGAoR/1MahOjB1UEEARxiosOPqrTeHCwQAkntzfQEIulj6y0Iu7CgjyN9ciM4WGf2+n5zSChGzpAhJS4X1wFkz9eMMn5LTYMFwGDOb1vVlku0sxGId9ECTtJUQPQt711OMLSscYbz9b5Lr18FUYKxZmG7qL45zEI/DUTDDdDFUojg12zddyByFIjvil5sbofeiIOuUw3AMjWMB06seFKbmJD0EQ2RkTDzTr64u32SpZCagsPa9jiKnoHgdXjfJl+o59mT+12zGJdMi+2JC3fJMwcPHDEODXFEvGRhUNXDN8MhNCsCH2RKP/7tCfFzzjZXZEzQ/e/erAAl+DLzr7OKFArC3ZFbhJf8QFxZzvhhycF9oDUfTx24W9QgahLIPyUWiXWKP91dLnfGaHOiOWmI6qtaRcTGIuKsUS0dyX9LDuD50/lQj4hLT6gyd1rZGRroRp38nvMw5C6ShCn9j9aHwJlDajxgboA2OOPrNntjYF+3Lti5yArM5TZBM= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; 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This is old fashion. > >>>> > >>>> > >>>> > >>>>Some people find it objectionable to see 1-off architecture specific > >>>>in-line > >>>>asm in a driver file, but I agree that putting it as close to the user as > >>>>possible makes sense. > >>> > >>> > >>>The proper solution might be to create an architecture independent > >>>interface > >>>for it, what it is that the function does. Can you explain what the > >>>purpose > >>>of locking/unlocking the cache line for MMC is? Is this something that > >>>could be done more generally in the dma_map_ops implementation? > >> > >> > >>It is a 1-off erratum workaround that is only needed on fewer than five > >>models/revisions of a mips64 based SoC family. As such, creating a general > >>purpose, architecture independent, framework is clearly not the proper > >>approach. > > > >If this is just for maintaining coherency of the DMA operation inbetween, > >then there is already a generic API for that, which the driver calls. > >Adding the workaround into octeon_dma_map_sg() would be a way > >to abstract the platform erratum from the driver. > > > > Either I am bad at explaining things, or you are not reading what I wrote. > > These are two facts about the bug: > > 1) The bug has nothing to do with coherency management, so hacking > something into dma_map* is the wrong thing to do. > > 2) The bug effects exactly one device, so hacking something into > common code that is used by other devices is the wrong thing to do. > > Suggesting that we use an alternate set of facts, although an > interesting exercise, doesn't get us closer to answering the > question of which source code file should contain the code. > > This is one opinion about the bug: > > 1) The bug is in the device, not the "platform", so putting the > workaround code in the driver for the device may be the cleanest > approach. I've moved the code into the octeon driver (drivers/mmc/host/cavium-octeon.c) and think this is the cleanest way to do it. --Jan > David Daney