Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755785AbdCWUb7 (ORCPT ); Thu, 23 Mar 2017 16:31:59 -0400 Received: from merlin.infradead.org ([205.233.59.134]:47232 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752632AbdCWUb5 (ORCPT ); Thu, 23 Mar 2017 16:31:57 -0400 Date: Thu, 23 Mar 2017 21:31:38 +0100 From: Peter Zijlstra To: kan.liang@intel.com Cc: mingo@redhat.com, acme@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, eranian@google.com, jolsa@kernel.org, ak@linux.intel.com Subject: Re: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Message-ID: <20170323203138.li45llrzfxcaqieu@hirez.programming.kicks-ass.net> References: <1490293551-5552-1-git-send-email-kan.liang@intel.com> <1490293551-5552-2-git-send-email-kan.liang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1490293551-5552-2-git-send-email-kan.liang@intel.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 647 Lines: 14 On Thu, Mar 23, 2017 at 11:25:49AM -0700, kan.liang@intel.com wrote: > From: Kan Liang > > When setting FREEZE_WHILE_SMM bit in IA32_DEBUGCTL, all performance > counters will be effected. There is no way to do per-counter freeze > on smi. So it should not use the per-event interface (e.g. ioctl or > event attribute) to set FREEZE_WHILE_SMM bit. > > Adds sysfs entry /sys/device/cpu/freeze_on_smi to set FREEZE_WHILE_SMM > bit in IA32_DEBUGCTL. When set, freezes perfmon and trace messages > while in SMM. > Value has to be 0 or 1. It will be applied to all possible cpus. So is there ever a good reason to not set this?