Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933511AbdCXHSs (ORCPT ); Fri, 24 Mar 2017 03:18:48 -0400 Received: from mail-vk0-f44.google.com ([209.85.213.44]:33234 "EHLO mail-vk0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752021AbdCXHSk (ORCPT ); Fri, 24 Mar 2017 03:18:40 -0400 MIME-Version: 1.0 In-Reply-To: <1489562800-27431-2-git-send-email-yong.mao@mediatek.com> References: <1489562800-27431-1-git-send-email-yong.mao@mediatek.com> <1489562800-27431-2-git-send-email-yong.mao@mediatek.com> From: Ulf Hansson Date: Fri, 24 Mar 2017 08:18:14 +0100 Message-ID: Subject: Re: [PATCH v5 1/3] mmc: dt-bindings: update Mediatek MMC bindings To: Yong Mao Cc: Rob Herring , Linus Walleij , Daniel Kurtz , Chaotian Jing , Eddie Huang , "linux-mmc@vger.kernel.org" , srv_heupstream , linux-mediatek@lists.infradead.org, "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2105 Lines: 49 On 15 March 2017 at 08:26, Yong Mao wrote: > From: yong mao > > Add description for mediatek,hs200-cmd-int-delay > Add description for mediatek,hs400-cmd-int-delay > Add description for mediatek,hs400-cmd-resp-sel-rising > > Signed-off-by: Yong Mao Thanks, applied for next! Kind regards Uffe > --- > Documentation/devicetree/bindings/mmc/mtk-sd.txt | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt > index 0120c7f..4182ea3 100644 > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt > @@ -21,6 +21,15 @@ Optional properties: > - assigned-clocks: PLL of the source clock > - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock > - hs400-ds-delay: HS400 DS delay setting > +- mediatek,hs200-cmd-int-delay: HS200 command internal delay setting. > + This field has total 32 stages. > + The value is an integer from 0 to 31. > +- mediatek,hs400-cmd-int-delay: HS400 command internal delay setting > + This field has total 32 stages. > + The value is an integer from 0 to 31. > +- mediatek,hs400-cmd-resp-sel-rising: HS400 command response sample selection > + If present,HS400 command responses are sampled on rising edges. > + If not present,HS400 command responses are sampled on falling edges. > > Examples: > mmc0: mmc@11230000 { > @@ -38,4 +47,7 @@ mmc0: mmc@11230000 { > assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; > assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>; > hs400-ds-delay = <0x14015>; > + mediatek,hs200-cmd-int-delay = <26>; > + mediatek,hs400-cmd-int-delay = <14>; > + mediatek,hs400-cmd-resp-sel-rising; > }; > -- > 1.7.9.5 >