Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965583AbdCXOPd (ORCPT ); Fri, 24 Mar 2017 10:15:33 -0400 Received: from mga14.intel.com ([192.55.52.115]:43214 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965434AbdCXOPW (ORCPT ); Fri, 24 Mar 2017 10:15:22 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,215,1486454400"; d="scan'208";a="947828145" From: "Liang, Kan" To: Thomas Gleixner , Peter Zijlstra CC: "mingo@redhat.com" , "acme@kernel.org" , "linux-kernel@vger.kernel.org" , "eranian@google.com" , "jolsa@kernel.org" , "ak@linux.intel.com" Subject: RE: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Thread-Topic: [PATCH 1/3] perf/x86: add sysfs entry to freeze counter on SMI Thread-Index: AQHSpARyOIb5UUisk0KlFjSvZGKZaKGiWyiAgADIv4CAAOFrYA== Date: Fri, 24 Mar 2017 14:15:16 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F077536C3CCB@SHSMSX103.ccr.corp.intel.com> References: <1490293551-5552-1-git-send-email-kan.liang@intel.com> <1490293551-5552-2-git-send-email-kan.liang@intel.com> <20170323203255.kps67homffxhl3cv@hirez.programming.kicks-ass.net> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzBmOGQ1YmEtYWY3NC00MjkyLWFmOWYtZTQyYjk3NmYwYmI1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImtNOGp1K3ZkSkVyR2JBeWlia0IzNUhNN2FkaEVSNGxyNWZrY1A4ZTlJNmc9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v2OEFtYF021949 Content-Length: 900 Lines: 28 > On Thu, 23 Mar 2017, Peter Zijlstra wrote: > > On Thu, Mar 23, 2017 at 11:25:49AM -0700, kan.liang@intel.com wrote: > > > + for_each_possible_cpu(cpu) { > > > + rdmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, > &debugctlmsr); > > > + if (val) > > > + wrmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, > debugctlmsr | DEBUGCTLMSR_FREEZE_WHILE_SMM); > > > + else > > > + wrmsrl_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, > debugctlmsr & ~DEBUGCTLMSR_FREEZE_WHILE_SMM); > > > + } > > > > No; that's just disgusting. Also {rd,wr}msr_on_cpu() should die, > > exactly because people end up writing crap like this. > > Aside of that this is completely broken against other users of > DEBUGCTLMSR because it's not atomic vs. the other modifications. > OK. I will change it. I guess I need a way/function which can atomically rd,wr msr on all cpus. Are there existing alternative ways/functions to do that? Thanks, Kan