Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965920AbdCXOry (ORCPT ); Fri, 24 Mar 2017 10:47:54 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:36339 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936195AbdCXOrj (ORCPT ); Fri, 24 Mar 2017 10:47:39 -0400 From: Doug Berger To: catalin.marinas@arm.com Cc: robh+dt@kernel.org, mark.rutland@arm.com, will.deacon@arm.com, computersforpeace@gmail.com, gregory.0xf0@gmail.com, f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, wangkefeng.wang@huawei.com, james.morse@arm.com, vladimir.murzin@arm.com, panand@redhat.com, andre.przywara@arm.com, cmetcalf@mellanox.com, mingo@kernel.org, sandeepa.s.prabhu@gmail.com, shijie.huang@arm.com, linus.walleij@linaro.org, treding@nvidia.com, jonathanh@nvidia.com, olof@lixom.net, mirza.krak@gmail.com, suzuki.poulose@arm.com, bgolaszewski@baylibre.com, horms+renesas@verge.net.au, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, opendmb@gmail.com Subject: [PATCH 0/9] bus: brcmstb_gisb: add support for GISBv7 arbiter Date: Fri, 24 Mar 2017 07:46:23 -0700 Message-Id: <20170324144632.5896-1-opendmb@gmail.com> X-Mailer: git-send-email 2.12.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1639 Lines: 37 This patch set contains changes to enable the GISB arbiter driver on the latest ARM64 architecture Set-Top Box chips from Broadcom. This driver relies on being able to hook the abort handlers of the processor core that are triggered by bus error signals generated by the GISB bus arbiter hardware found in BCM7XXX chips. The first three patches are based on the arm64/for-next/core branch to enable this functionality for the arm64 architecture. The remaining patches correct some issues with the existing driver, add the ARM64 architecture specific support to the driver, and finally add the new register map for the GISBv7 hardware first appearing in the BCM7278 device. Doug Berger (7): arm64: mm: mark fault_info __ro_after_init arm64: mm: install SError abort handler bus: brcmstb_gisb: Use register offsets with writes too bus: brcmstb_gisb: Correct hooking of ARM aborts bus: brcmstb_gisb: correct support for 64-bit address output bus: brcmstb_gisb: add ARM64 SError support bus: brcmstb_gisb: update to support new revision Florian Fainelli (2): arm64: mm: Allow installation of memory abort handlers bus: brcmstb_gisb: Add ARM64 support .../devicetree/bindings/bus/brcm,gisb-arb.txt | 3 +- arch/arm64/include/asm/system_misc.h | 5 + arch/arm64/kernel/entry.S | 69 ++++++++++++-- arch/arm64/mm/fault.c | 48 +++++++++- drivers/bus/Kconfig | 2 +- drivers/bus/brcmstb_gisb.c | 106 ++++++++++++++++----- 6 files changed, 197 insertions(+), 36 deletions(-) -- 2.12.0