Message-ID: <58D565C5.2080001@cs.rutgers.edu>
Date: Fri, 24 Mar 2017 13:30:29 -0500
From: Zi Yan <zi.yan@cs.rutgers.edu>
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To: Tim Chen <tim.c.chen@linux.intel.com>
CC: Zi Yan <zi.yan@sent.com>, <linux-kernel@vger.kernel.org>,
        <linux-mm@kvack.org>, <kirill.shutemov@linux.intel.com>,
        <akpm@linux-foundation.org>, <minchan@kernel.org>, <vbabka@suse.cz>,
        <mgorman@techsingularity.net>, <mhocko@kernel.org>,
        <n-horiguchi@ah.jp.nec.com>, <khandual@linux.vnet.ibm.com>,
        <dnellans@nvidia.com>
Subject: Re: [PATCH v4 01/11] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit
 7 to bit 1
References: <20170313154507.3647-1-zi.yan@sent.com>  <20170313154507.3647-2-zi.yan@sent.com> <1490379805.2733.133.camel@linux.intel.com>
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Tim Chen wrote:
> On Mon, 2017-03-13 at 11:44 -0400, Zi Yan wrote:
>> From: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
>>
>> pmd_present() checks _PAGE_PSE along with _PAGE_PRESENT to avoid
>> false negative return when it races with thp spilt
>> (during which _PAGE_PRESENT is temporary cleared.) I don't think that
>> dropping _PAGE_PSE check in pmd_present() works well because it can
>> hurt optimization of tlb handling in thp split.
>> In the current kernel, bits 1-4 are not used in non-present format
>> since commit 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to=

>> work around erratum"). So let's move _PAGE_SWP_SOFT_DIRTY to bit 1.
>> Bit 7 is used as reserved (always clear), so please don't use it for
>> other purpose.
>>
>> Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
>> Signed-off-by: Zi Yan <zi.yan@cs.rutgers.edu>
>> ---
>>  arch/x86/include/asm/pgtable_64.h    | 12 +++++++++---
>>  arch/x86/include/asm/pgtable_types.h | 10 +++++-----
>>  2 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/=
pgtable_64.h
>> index 73c7ccc38912..a5c4fc62e078 100644
>> --- a/arch/x86/include/asm/pgtable_64.h
>> +++ b/arch/x86/include/asm/pgtable_64.h
>> @@ -157,15 +157,21 @@ static inline int pgd_large(pgd_t pgd) { return =
0; }
>>  /*
>>   * Encode and de-code a swap entry
>>   *
>> - * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0| <- bit numb=
er
>> - * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit name=
s
>> - * | OFFSET (14->63) | TYPE (9-13)  |0|X|X|X| X| X|X|X|0| <- swp entr=
y
>> + * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2| 1|0| <- bit num=
ber
>> + * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit nam=
es
>> + * | OFFSET (14->63) | TYPE (9-13)  |0|0|X|X| X| X|X|SD|0| <- swp ent=
ry
>>   *
>>   * G (8) is aliased and used as a PROT_NONE indicator for
>>   * !present ptes.  We need to start storing swap entries above
>>   * there.  We also need to avoid using A and D because of an
>>   * erratum where they can be incorrectly set by hardware on
>>   * non-present PTEs.
>> + *
>> + * SD (1) in swp entry is used to store soft dirty bit, which helps u=
s
>> + * remember soft dirty over page migration
>> + *
>> + * Bit 7 in swp entry should be 0 because pmd_present checks not only=
 P,
>> + * but also G.
>=20
> but also L and G.

Got it. Thanks.

--=20
Best Regards,
Yan Zi


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