Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752544AbdC0LFO (ORCPT ); Mon, 27 Mar 2017 07:05:14 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:6725 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751821AbdC0LFD (ORCPT ); Mon, 27 Mar 2017 07:05:03 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 27 Mar 2017 03:59:33 -0700 Subject: Re: [PATCH v2 5/7] clk: tegra: don't warn for PLL defaults unnecessarily To: Peter De Schrijver , Prashant Gaikwad , Michael Turquette , "Stephen Boyd" , Stephen Warren , "Thierry Reding" , Alexandre Courbot , "Rob Herring" , Mark Rutland , "Rhyland Klein" , , , , References: <1487846686-6388-1-git-send-email-pdeschrijver@nvidia.com> <1487846686-6388-6-git-send-email-pdeschrijver@nvidia.com> From: Jon Hunter Message-ID: Date: Mon, 27 Mar 2017 12:02:28 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <1487846686-6388-6-git-send-email-pdeschrijver@nvidia.com> X-Originating-IP: [10.26.11.99] X-ClientProxiedBy: DRUKMAIL101.nvidia.com (10.25.59.19) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1249 Lines: 35 Hi Peter, On 23/02/17 10:44, Peter De Schrijver wrote: > If the PLL is on, only warn if the defaults are not yet set. Otherwise be > silent. > > Signed-off-by: Peter De Schrijver > --- > drivers/clk/tegra/clk-tegra210.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c > index b7ef8a7..fe698d2 100644 > --- a/drivers/clk/tegra/clk-tegra210.c > +++ b/drivers/clk/tegra/clk-tegra210.c > @@ -502,7 +502,7 @@ static void tegra210_pllcx_set_defaults(const char *name, > pllcx->params->defaults_set = true; > > if (readl_relaxed(clk_base + pllcx->params->base_reg) & > - PLL_ENABLE) { > + PLL_ENABLE && !pllcx->params->defaults_set) { > /* PLL is ON: only check if defaults already set */ > pllcx_check_defaults(pllcx->params); > pr_warn("%s already enabled. Postponing set full defaults\n", The above hunk is causing the Tegra210 Smaug boot to fail. Looking more at the code, I believe that the above hunk is not correct, because 'defaults_set' is always true and this is now causing us to always reset the PLL if in-use or not. I will send a patch to correct this. Cheers Jon -- nvpublic