Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752817AbdC0M4m (ORCPT ); Mon, 27 Mar 2017 08:56:42 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:42628 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752145AbdC0M41 (ORCPT ); Mon, 27 Mar 2017 08:56:27 -0400 From: Ludovic Barre To: Cyrille Pitchen , Marek Vasut CC: David Woodhouse , Brian Norris , Boris Brezillon , Richard Weinberger , Alexandre Torgue , Rob Herring , , , Subject: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Date: Mon, 27 Mar 2017 14:54:54 +0200 Message-ID: <1490619296-8168-1-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.21.195] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-03-27_11:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1103 Lines: 27 From: Ludovic Barre This patch set adds a SPI-NOR driver for stm32 QSPI controller. It is a specialized SPI interface for serial Flash devices. It supports 1 or 2 Flash device with single, dual and quad SPI Flash memories. It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory Ludovic Barre (2): dt-bindings: Document the STM32 QSPI bindings mtd: spi-nor: add driver for STM32 quad spi flash controller .../devicetree/bindings/mtd/stm32-quadspi.txt | 45 ++ drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/stm32-quadspi.c | 679 +++++++++++++++++++++ 4 files changed, 732 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/stm32-quadspi.txt create mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c -- 2.7.4