Date: Mon, 27 Mar 2017 18:57:10 +0200
From: Borislav Petkov <bp@alien8.de>
To: kan.liang@intel.com
Cc: peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com,
        linux-kernel@vger.kernel.org, acme@kernel.org, eranian@google.com,
        jolsa@kernel.org, ak@linux.intel.com
Subject: Re: [PATCH V2 1/2] x86/msr: add msr_set/clear_bit_on_cpu/cpus access
 functions
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On Mon, Mar 27, 2017 at 08:47:37AM -0700, kan.liang@intel.com wrote:
> From: Kan Liang <Kan.liang@intel.com>
> 
> Having msr_set/clear_bit on many cpus or given CPU can avoid extra
> unnecessory IPIs

How does that happen?

You have smp_call_function_many() sending IPIs to each CPU in the mask.
Doesn't look like avoiding anything to me.

Now if you want to have interfaces set/clear_bit_on_cpu(s), that's a
different story.

And those actually double the amount of IPIs the moment you do a
read-modify-write operation on the MSR, i.e., you want to read *and*
write afterwards.

If you only want to do a single operation - set or clear - like you're
doing in your other patch, then I guess that's fine as it wraps the
smp_call_function* boilerplate code.

> and simplify MSR content manipulation, when it only
> needs to flip a bit.
> There is already msr_set/clear_bit, but missing the _on_cpu and _on_cpus
> version.
> 
> Signed-off-by: Kan Liang <Kan.liang@intel.com>
> ---
>  arch/x86/include/asm/msr.h | 29 ++++++++++++++++++
>  arch/x86/lib/msr-smp.c     | 76 ++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 105 insertions(+)
> 
> diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
> index 898dba2..9bc999b 100644
> --- a/arch/x86/include/asm/msr.h
> +++ b/arch/x86/include/asm/msr.h
> @@ -20,6 +20,11 @@ struct msr {
>  	};
>  };
>  
> +struct msr_bit_info {
> +	u32 msr_no;
> +	u8 bit;
> +};

No, not *another* struct msr*info. Please reuse msr_info.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.