Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932288AbdC1LVC (ORCPT ); Tue, 28 Mar 2017 07:21:02 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:59110 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755269AbdC1LTv (ORCPT ); Tue, 28 Mar 2017 07:19:51 -0400 From: Alexandre Belloni To: Nicolas Ferre Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Boris Brezillon , Wenyou.Yang@microchip.com, Alexandre Belloni Subject: [PATCH v2 08/11] ARM: at91: pm: Tie the USB clock mask to the pmc Date: Tue, 28 Mar 2017 13:19:35 +0200 Message-Id: <20170328111938.21297-9-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170328111938.21297-1-alexandre.belloni@free-electrons.com> References: <20170328111938.21297-1-alexandre.belloni@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3209 Lines: 105 The USB clocks mask (uhp_udp_mask) depends on the pmc. Tie it to the pmc id instead of the SoC. Signed-off-by: Alexandre Belloni --- arch/arm/mach-at91/pm.c | 37 +++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index ddf62a006635..a7c047f0d21f 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -442,31 +442,46 @@ static void __init at91_pm_sram_init(void) &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); } +struct pmc_info { + unsigned long uhp_udp_mask; +}; + +static const struct pmc_info pmc_infos[] __initconst = { + { .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP }, + { .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP }, + { .uhp_udp_mask = AT91SAM926x_PMC_UHP }, +}; + static const struct of_device_id atmel_pmc_ids[] __initconst = { - { .compatible = "atmel,at91rm9200-pmc" }, - { .compatible = "atmel,at91sam9260-pmc" }, - { .compatible = "atmel,at91sam9g45-pmc" }, - { .compatible = "atmel,at91sam9n12-pmc" }, - { .compatible = "atmel,at91sam9x5-pmc" }, - { .compatible = "atmel,sama5d3-pmc" }, - { .compatible = "atmel,sama5d2-pmc" }, + { .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] }, + { .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] }, + { .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] }, + { .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] }, + { .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] }, + { .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] }, + { .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] }, { /* sentinel */ }, }; static void __init at91_pm_init(void (*pm_idle)(void)) { struct device_node *pmc_np; + const struct of_device_id *of_id; + const struct pmc_info *pmc; if (at91_cpuidle_device.dev.platform_data) platform_device_register(&at91_cpuidle_device); - pmc_np = of_find_matching_node(NULL, atmel_pmc_ids); + pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id); pm_data.pmc = of_iomap(pmc_np, 0); if (!pm_data.pmc) { pr_err("AT91: PM not supported, PMC not found\n"); return; } + pmc = of_id->data; + pm_data.uhp_udp_mask = pmc->uhp_udp_mask; + if (pm_idle) arm_pm_idle = pm_idle; @@ -487,35 +502,29 @@ void __init at91rm9200_pm_init(void) */ at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0); - pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; - at91_pm_init(at91rm9200_idle); } void __init at91sam9260_pm_init(void) { at91_dt_ramc(); - pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; at91_pm_init(at91sam9_idle); } void __init at91sam9g45_pm_init(void) { at91_dt_ramc(); - pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; at91_pm_init(at91sam9_idle); } void __init at91sam9x5_pm_init(void) { at91_dt_ramc(); - pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; at91_pm_init(at91sam9_idle); } void __init sama5_pm_init(void) { at91_dt_ramc(); - pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; at91_pm_init(NULL); } -- 2.11.0