Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754906AbdC1Orc (ORCPT ); Tue, 28 Mar 2017 10:47:32 -0400 Received: from mail-wr0-f178.google.com ([209.85.128.178]:35165 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752782AbdC1Oqs (ORCPT ); Tue, 28 Mar 2017 10:46:48 -0400 From: Jerome Brunet To: Michael Turquette , Stephen Boyd , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/8] clk: meson: gxbb: protect against holes in the onecell_data array Date: Tue, 28 Mar 2017 16:45:59 +0200 Message-Id: <20170328144605.25278-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170328144605.25278-1-jbrunet@baylibre.com> References: <20170328144605.25278-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 861 Lines: 27 The clock controller is getting more complex and it might be possible, in the future, to have holes in the clk_hw_onecell_data array. Just make sure we skip those holes if it ever happens. Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 75197664a7ee..28812ea41a60 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -1388,6 +1388,10 @@ static int gxbb_clkc_probe(struct platform_device *pdev) * register all clks */ for (clkid = 0; clkid < clkc_data->hw_onecell_data->num; clkid++) { + /* array might be sparse */ + if (!clkc_data->hw_onecell_data->hws[clkid]) + continue; + ret = devm_clk_hw_register(dev, clkc_data->hw_onecell_data->hws[clkid]); if (ret) -- 2.9.3