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From: David Laight <David.Laight@ACULAB.COM>
To: "'Robin Murphy'" <robin.murphy@arm.com>, Mason <slash.tmp@free.fr>
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Subject: RE: [PATCH v3 2/2] PCI: Add tango PCIe host bridge support
Thread-Topic: [PATCH v3 2/2] PCI: Add tango PCIe host bridge support
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Date: Wed, 29 Mar 2017 14:38:28 +0000
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> > For my education, what is the API to send an IPI?
> > And the API to handle an IPI?
> 
> There are a few ways you could implement some custom cross-call,
> although in this case I think stop_machine() would probably be the most
> appropriate candidate. However, you're right that in general it may not
> actually help enough to be worthwhile - a DSB SY would ensure that
> in-flight transactions have at least been observed by the CPUs and any
> other coherent masters, but for any writes with a memory type allowing
> early acknowledgement (i.e. a Normal or Device mapping of a BAR) that
> doesn't necessarily correlate with them having reached their ultimate
> destination. For a PCI destination in particular, I think the normal way
> to ensure all posted writes have completed would be to read from config
> space; ah...

He almost certainly doesn't need to wait for the cycle to complete,
just long enough for the cycle to have been sent.

	David