Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933321AbdC3H7K (ORCPT ); Thu, 30 Mar 2017 03:59:10 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:25716 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932650AbdC3H7I (ORCPT ); Thu, 30 Mar 2017 03:59:08 -0400 Subject: Re: [PATCH] serial: Do not treat the IIR register as a bitfield To: Olliver Schinagl , Greg Kroah-Hartman , Jiri Slaby , Laxman Dewangan , Stephen Warren , Thierry Reding , Alexandre Courbot , "David S . Miller" References: <20170329184431.6226-1-oliver@schinagl.nl> <6be65e8b-eea4-08ed-0b30-5c0608764a83@ti.com> CC: "dev@linux-sunxi.org" , Ed Blake , Andy Shevchenko , Alexander Sverdlin , Yegor Yefremov , Wan Ahmad Zainie , Kefeng Wang , Heikki Krogerus , Heiko Stuebner , Jason Uy , Douglas Anderson , Peter Hurley , Tony Lindgren , Thor Thayer , David Lechner , Jan Kiszka , "linux-serial@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "sparclinux@vger.kernel.org" From: Vignesh R Message-ID: <2faa7420-0a54-e77f-0da2-80f6dfcf9710@ti.com> Date: Thu, 30 Mar 2017 13:27:19 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1904 Lines: 49 On Thursday 30 March 2017 12:13 PM, Olliver Schinagl wrote: > > > On March 30, 2017 8:15:29 AM CEST, Vignesh R wrote: >> Hi, >> >> On Thursday 30 March 2017 12:14 AM, Olliver Schinagl wrote: >>> diff --git a/include/uapi/linux/serial_reg.h >> b/include/uapi/linux/serial_reg.h >>> index 5db76880b4ad..489522389a10 100644 >>> --- a/include/uapi/linux/serial_reg.h >>> +++ b/include/uapi/linux/serial_reg.h >>> @@ -31,18 +31,18 @@ >>> #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */ >>> >>> #define UART_IIR 2 /* In: Interrupt ID Register */ >>> -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ >>> -#define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ >>> #define UART_IIR_MSI 0x00 /* Modem status interrupt */ >>> +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ >>> #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ >>> #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ >>> #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ >>> - >>> #define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */ >>> +#define UART_IIR_RX_TIMEOUT 0x0c /* DesignWare RX Timeout interrupt >> */ > It was moved due to sorting. The comment could be changed maybe? I renamed it from omap to dw as i believe the omap also uses the dw ip. But i think it is a defacto standard mapping of the irr register? AFAIK, OMAP UART does not use DW core, please make these IDs generic to avoid confusion. > >>> +#define UART_IIR_MASK 0x0f /* DesignWare IIR mask */ >>> >>> -#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */ >> >> You are removing UART_IIR_RX_TIMEOUT? Is this intended? >> >>> #define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */ >>> #define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */ >>> +#define UART_IIR_EXT_MASK 0x30 /* OMAP extended IIR mask */ > -- Regards Vignesh