Subject: Re: [PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default
To: Thomas Gleixner <tglx@linutronix.de>,
        Aniruddha Banerjee <aniruddhab@nvidia.com>
References: <fe0774b2000848a6bd065efc649c6eab@bgmail102.nvidia.com>
 <alpine.DEB.2.20.1703310953520.1780@nanos>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Thierry Reding <treding@nvidia.com>,
        Stephen Warren <swarren@nvidia.com>
From: Marc Zyngier <marc.zyngier@arm.com>
Organization: ARM Ltd
Message-ID: <6bb214e5-7007-8541-ca95-838542f95b2a@arm.com>
Date: Fri, 31 Mar 2017 09:16:11 +0100
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On 31/03/17 09:01, Thomas Gleixner wrote:
> On Thu, 30 Mar 2017, Aniruddha Banerjee wrote:
> 
>> add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are
>> not configured as edge-triggered, which may be wrong for certain GIC
>> implementations such as the GIC-400
> 
> The above is just useless blurb.
> 
> I can't figure out at all WHY a generic interface has anything to do with
> edge trigger configuration.
> 
> I assume this is (Nvidia) GIC specific nonsense, so why are you inflicting
> this on every caller of this interface unconditionally w/o explaining what
> the impact of this change might be and why it does not cause havoc for any
> existing caller?
> 
> This is function is implemented in kernel/irq/ not in foo/gic/ so you
> better come up with some coherent explanation.

Indeed. I'm not aware of anything wrong so far with GIC400, so this is
most likely referring to an integration issue.

Furthermore, PPI triggers are usually not configurable on GIC400. My bet
is that this is only a DT issue, but in the absence of any coherent
justification, it is hard to make an educated guess...

Aniruddha: please state your problem clearly so that we can understand
what exactly is going wrong.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...