Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933390AbdCaQjz (ORCPT ); Fri, 31 Mar 2017 12:39:55 -0400 Received: from vps0.lunn.ch ([178.209.37.122]:41962 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933159AbdCaQjy (ORCPT ); Fri, 31 Mar 2017 12:39:54 -0400 Date: Fri, 31 Mar 2017 18:39:49 +0200 From: Andrew Lunn To: Vivien Didelot Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@savoirfairelinux.com, "David S. Miller" , Florian Fainelli Subject: Re: [PATCH net-next v2 9/9] net: dsa: mv88e6xxx: add cross-chip bridging Message-ID: <20170331163949.GI12814@lunn.ch> References: <20170330213715.9666-1-vivien.didelot@savoirfairelinux.com> <20170330213715.9666-10-vivien.didelot@savoirfairelinux.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170330213715.9666-10-vivien.didelot@savoirfairelinux.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 657 Lines: 17 On Thu, Mar 30, 2017 at 05:37:15PM -0400, Vivien Didelot wrote: > Implement the DSA cross-chip bridging operations by remapping the local > ports an external source port can egress frames to, when this cross-chip > port joins or leaves a bridge. > > The PVT is no longer configured with all ones allowing any external > frame to egress any local port. Only DSA and CPU ports, as well as > bridge group members, can egress frames on local ports. Hi Vivien With the ZII devel B, we have two switches with PVT, and one without. What happens in this setup? Can the non-PVT switch leak frames out user ports which should otherwise be blocked? Thanks Andrew