Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755453AbdDABlN (ORCPT ); Fri, 31 Mar 2017 21:41:13 -0400 Received: from mga02.intel.com ([134.134.136.20]:21974 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755058AbdDABlM (ORCPT ); Fri, 31 Mar 2017 21:41:12 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,254,1486454400"; d="scan'208";a="242675433" From: "Liang, Kan" To: Stephane Eranian CC: Peter Zijlstra , "mingo@redhat.com" , Arnaldo Carvalho de Melo , LKML , Thomas Gleixner , "Jiri Olsa" , "ak@linux.intel.com" Subject: RE: [PATCH 0/3]measure SMI cost Thread-Topic: [PATCH 0/3]measure SMI cost Thread-Index: AQHSpARyK/EZaqE9Zk+BnaMVBcLFrKGvA7GAgADGDWA= Date: Sat, 1 Apr 2017 01:41:07 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F077536C9A61@SHSMSX103.ccr.corp.intel.com> References: <1490293551-5552-1-git-send-email-kan.liang@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjVjNTc3NjEtNzdlYS00OTVmLTlkOTAtYjU1OGVhYjVjMDRmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjdRWTlYamc4S0I4eFJHUGdJcDlJR2NYRm9kUjN1UGJjdng3S2ppdkowRWc9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v311fcxI008846 Content-Length: 1047 Lines: 30 > On Thu, Mar 23, 2017 at 11:25 AM, wrote: > > From: Kan Liang > > > > Currently, there is no way to measure the time cost in System > > management mode (SMM) by perf. > > > > Intel perfmon supports FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. Once > it > > sets, the PMU core counters will freeze on SMI handler. But it will > > not have an effect on free running counters. E.g. APERF counter. > > The cost of SMI can be measured by (aperf - cycles). > > > > A new sysfs entry /sys/device/cpu/freeze_on_smi is introduced to set > > FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. > > > > A new --smi-cost mode in perf stat is implemented to measure the SMI > > cost by calculating cycles and aperf results. In practice, the > > percentages of SMI cycles should be more useful than absolute value. > > So the output will be the percentage of SMI cycles and SMI#. > > > You are talking about the percentage of what cycles? > Wallclock, unhalted_ref_cycles, unhalted_core_cycles? Unhalted core cycles. Thanks, Kan