Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753147AbdDCMzg (ORCPT ); Mon, 3 Apr 2017 08:55:36 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:11676 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751994AbdDCMze (ORCPT ); Mon, 3 Apr 2017 08:55:34 -0400 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 03 Apr 2017 05:55:33 -0700 Subject: Re: [PATCH 1/1] arm64: tegra: fix PPI interrupt flag To: Aniruddha Banerjee , Thierry Reding , Marc Zyngier References: <7fad40fbcaa94c1ea46328e78b46443b@bgmail102.nvidia.com> CC: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-tegra@vger.kernel.org" , Alexander Van Brunt From: Jon Hunter Message-ID: <6c64238f-a462-9e05-2f04-e989c16553c6@nvidia.com> Date: Mon, 3 Apr 2017 13:55:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <7fad40fbcaa94c1ea46328e78b46443b@bgmail102.nvidia.com> X-Originating-IP: [10.26.11.77] X-ClientProxiedBy: DRUKMAIL102.nvidia.com (10.25.59.20) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3709 Lines: 98 Adding Marc ... On 03/04/17 12:19, Aniruddha Banerjee wrote: > The interrupt flag for PPI should not be set to any value, since the > register is read-only. Fix the flags for the PPI interrupts to > IRQ_TYPE_NONE, so that there is no write to the read-only register. If the below matches the h/w default, does this really cause a problem? Note, we will not attempt to write the type if it matches the current programmed type. I had thought that the in DT file, the type for the PPI should align with the h/w default in the case where it cannot be written. However, I guess this is not explicitly stated anywhere I have found, but at the same time the binding doc for the arm,gic.txt does not list "IRQ_TYPE_NONE" as an option. Marc, what are your thoughts? > Signed-off-by: Aniruddha Banerjee > --- > arch/arm64/boot/dts/nvidia/tegra132.dtsi | 8 ++++---- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8 ++++---- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 ++++---- > 3 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi > index 3f3a46a4bd01..219fb3c6a273 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi > @@ -1093,13 +1093,13 @@ > timer { > compatible = "arm,armv7-timer"; > interrupts = - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>; > interrupt-parent = <&gic>; > }; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > index 62fa85ae0271..e602299f7694 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > @@ -390,13 +390,13 @@ > timer { > compatible = "arm,armv8-timer"; > interrupts = - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>; > interrupt-parent = <&gic>; > }; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > index 2f832df29da8..6f3060b40a40 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi > @@ -1214,13 +1214,13 @@ > timer { > compatible = "arm,armv8-timer"; > interrupts = - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>, > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_NONE)>; > interrupt-parent = <&gic>; > }; Cheers Jon -- nvpublic