Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752515AbdDCU1C (ORCPT ); Mon, 3 Apr 2017 16:27:02 -0400 Received: from mail.kernel.org ([198.145.29.136]:49686 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751646AbdDCU1A (ORCPT ); Mon, 3 Apr 2017 16:27:00 -0400 MIME-Version: 1.0 In-Reply-To: <20170331085025.GC17067@hao-dev> References: <1490875696-15145-1-git-send-email-hao.wu@intel.com> <1490875696-15145-12-git-send-email-hao.wu@intel.com> <20170331085025.GC17067@hao-dev> From: Alan Tull Date: Mon, 3 Apr 2017 15:26:14 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 11/16] fpga: intel: fme: add partial reconfiguration sub feature support To: Wu Hao Cc: Moritz Fischer , linux-fpga@vger.kernel.org, linux-kernel , luwei.kang@intel.com, yi.z.zhang@intel.com, Tim Whisonant , Enno Luebbers , Shiva Rao , Christopher Rauer , Xiao Guangrong , xiaoguangrong.eric@gmail.com Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2557 Lines: 66 On Fri, Mar 31, 2017 at 3:50 AM, Wu Hao wrote: > On Fri, Mar 31, 2017 at 12:11:12PM +0800, Xiao Guangrong wrote: >> On 31/03/2017 4:30 AM, Alan Tull wrote: >> >On Thu, Mar 30, 2017 at 7:08 AM, Wu Hao wrote: >> >>From: Kang Luwei >> >> >> >>Partial Reconfiguration (PR) is the most important function for FME. It >> >>allows reconfiguration for given Port/Accelerated Function Unit (AFU). >> >> >> >>This patch adds support for PR sub feature. In this patch, it registers >> >>a fpga_mgr and implements fpga_manager_ops, and invoke fpga_mgr_buf_load >> >>for PR operation once PR request received via ioctl. Below user space >> >>interfaces are exposed by this sub feature. >> >> >> >>Sysfs interface: >> >>* /sys/class/fpga///interface_id >> >> Read-only. Indicate the hardware interface information. Userspace >> >> applications need to check this interface to select correct green >> >> bitstream format before PR. >> >> >> >>Ioctl interface: >> >>* FPGA_FME_PORT_PR >> >> Do partial reconfiguration per information from userspace, including >> >> target port(AFU), buffer size and address info. It returns the PR status >> >> (PR error code if failed) to userspace. >> >> >> >>Signed-off-by: Tim Whisonant >> >>Signed-off-by: Enno Luebbers >> >>Signed-off-by: Shiva Rao >> >>Signed-off-by: Christopher Rauer >> >>Signed-off-by: Alan Tull >> > >> >Hi Wu Hao, >> > >> >Thanks for submitting your patches. >> > >> >I think there's been a misunderstanding of the meaning of >> >'Signed-off-by' [1]. I have not signed off on this code or had a hand >> >in its development. But I'm happy to get to review it now. It will >> >take a bit of time; I expect to be replying next week. >> >> Hi Alan, >> >> Sorry to confuse you, i think it's because you helped Chris a lot to >> implement this interface and we'd like to include your credit as this >> way. If you dislike, it will be dropped. :) >> >> Thanks for your review in advance. >> > > Hi Alan, > > Sorry about this, we should ask you firstly before doing it this way. > Let me know if you don't like it, I will drop it in the next version. Yes please drop the signed-off-by: me in the next version. Also, you don't need to cc my Intel email address. Alan > > Many thanks for your time and review on these patches. Look forward > for your feedback and comments. :) > > Thanks > Hao