Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752483AbdDDBtA (ORCPT ); Mon, 3 Apr 2017 21:49:00 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:35143 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752169AbdDDBs7 (ORCPT ); Mon, 3 Apr 2017 21:48:59 -0400 From: Daniel Axtens To: Madhavan Srinivasan , mpe@ellerman.id.au Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, ego@linux.vnet.ibm.com, bsingharora@gmail.com, benh@kernel.crashing.org, paulus@samba.org, anton@samba.org, sukadev@linux.vnet.ibm.com, mikey@neuling.org, stewart@linux.vnet.ibm.com, eranian@google.com, Hemant Kumar , Anju T Sudhakar , Madhavan Srinivasan Subject: Re: [PATCH v6 01/11] powerpc/powernv: Data structure and macros definitions In-Reply-To: <1491231308-15282-2-git-send-email-maddy@linux.vnet.ibm.com> References: <1491231308-15282-1-git-send-email-maddy@linux.vnet.ibm.com> <1491231308-15282-2-git-send-email-maddy@linux.vnet.ibm.com> User-Agent: Notmuch/0.22.1 (http://notmuchmail.org) Emacs/24.5.1 (x86_64-pc-linux-gnu) Date: Tue, 04 Apr 2017 11:48:50 +1000 Message-ID: <87h925kkn1.fsf@possimpible.ozlabs.ibm.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1358 Lines: 55 Hi, > +#define IMC_MAX_CHIPS 32 > +#define IMC_MAX_PMUS 32 > +#define IMC_MAX_PMU_NAME_LEN 256 I've noticed this is used as both the maximum length for event names and event value strings. Would another name suit better? > + > +#define IMC_NEST_MAX_PAGES 16 > + > +#define IMC_DTB_COMPAT "ibm,opal-in-memory-counters" > +#define IMC_DTB_NEST_COMPAT "ibm,imc-counters-nest" > + > +/* > + * Structure to hold per chip specific memory address > + * information for nest pmus. Nest Counter data are exported > + * in per-chip reserved memory region by the PORE Engine. > + */ > +struct perchip_nest_info { > + u32 chip_id; > + u64 pbase; > + u64 vbase[IMC_NEST_MAX_PAGES]; > + u64 size; > +}; > + > +/* > + * Place holder for nest pmu events and values. > + */ > +struct imc_events { > + char *ev_name; > + char *ev_value; > +}; > + > +/* > + * Device tree parser code detects IMC pmu support and > + * registers new IMC pmus. This structure will > + * hold the pmu functions and attrs for each imc pmu and > + * will be referenced at the time of pmu registration. > + */ > +struct imc_pmu { > + struct pmu pmu; > + int domain; > + const struct attribute_group *attr_groups[4]; > +}; > + > +/* > + * Domains for IMC PMUs > + */ > +#define IMC_DOMAIN_NEST 1 > +#define IMC_DOMAIN_UNKNOWN -1 > + > +#endif /* PPC_POWERNV_IMC_PMU_DEF_H */ > -- > 2.7.4