Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753533AbdDDJxn (ORCPT ); Tue, 4 Apr 2017 05:53:43 -0400 Received: from hermes.aosc.io ([199.195.250.187]:56932 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752882AbdDDJxG (ORCPT ); Tue, 4 Apr 2017 05:53:06 -0400 From: Icenowy Zheng To: Maxime Ripard , Chen-Yu Tsai , Rob Herring Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v4 5/5] arm64: allwinner: a64: add R_PIO pinctrl node Date: Tue, 4 Apr 2017 17:51:00 +0800 Message-Id: <20170404095100.18649-6-icenowy@aosc.io> In-Reply-To: <20170404095100.18649-1-icenowy@aosc.io> References: <20170404095100.18649-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1051 Lines: 35 From: Icenowy Zheng Allwinner A64 have a dedicated pin controller to manage the PL pin bank. As the driver and the required clock support are added, add the device node for it. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1d4e5bcced0c..6bc606b4d74d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -409,5 +409,17 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun50i-a64-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = ; + clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + }; }; }; -- 2.12.2