Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756913AbdDFJSR (ORCPT ); Thu, 6 Apr 2017 05:18:17 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:35879 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754255AbdDFInL (ORCPT ); Thu, 6 Apr 2017 04:43:11 -0400 Date: Thu, 6 Apr 2017 10:43:01 +0200 (CEST) From: Thomas Gleixner To: Dou Liyang cc: x86@kernel.org, linux-kernel@vger.kernel.org, mingo@kernel.org, ebiederm@xmission.com, bhe@redhat.com, hpa@zytor.com, izumi.taku@jp.fujitsu.com Subject: Re: [RFC PATCH 0/6] Unify the Interrupt Mode and setup it as soon as possible In-Reply-To: <1490799333-18242-1-git-send-email-douly.fnst@cn.fujitsu.com> Message-ID: References: <1490799333-18242-1-git-send-email-douly.fnst@cn.fujitsu.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1310 Lines: 53 On Wed, 29 Mar 2017, Dou Liyang wrote: > The purpose of this patchset is Unifing these setup steps and executing as > soon as possible as follows: > > start_kernel > ---------------+ > | > | > | > | init_IRQ > +---->---+----+ > | | > | | +--------------------+ > | +----> | 4. init_bsp_APIC | > | +--------------------+ > v > > By the way, Also fix a bug about kexec[3]. > > > Some doubts, need help: > > 1. Patchset has influence on IOMMU in enable_IR_x2apic(). Not sure > it can be in advance? That should work. > 2. Due to > > Commit 8c3ba8d04924 ("x86, apic: ack all pending irqs when crashed/on kexec") > > ..., patchset also needs TSC and uses the "cpu_khz" in setup_local_APIC(). > And a warning[4] will be triggered when crashed/on kexec. Not sure how to > modify? The local APIC timer initialization cannot be run from init_IRQ(). The problem here is that CPU and TSC frequency calibration depends on the PIT/HPET interrupt (irq 0) working for machines which cannot calibrate via MSR/CPUID or if fast calibration via PIT fails. So we need to split that initialization into several parts: 1) Set up the APIC/IOAPIC (including testing whether the timer interrupt works) 2) Calibrate TSC 3) Set up the local APIC timer Thanks, tglx