Date: Thu, 6 Apr 2017 18:28:57 +0200
From: Thierry Reding <thierry.reding@gmail.com>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: robh+dt@kernel.org, jonathanh@nvidia.com, mark.rutland@arm.com,
        linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead
 of local implementation
Message-ID: <20170406162857.GB24332@ulmo.ba.sec>
References: <1491488461-24621-1-git-send-email-ldewangan@nvidia.com>
 <1491488461-24621-2-git-send-email-ldewangan@nvidia.com>
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On Thu, Apr 06, 2017 at 07:50:58PM +0530, Laxman Dewangan wrote:
> Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one

"closest"

Thierry

> instead of implementing the same locally. This increase readability.
>=20
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> ---
> Changes from V1:
> None
>=20
>  drivers/pwm/pwm-tegra.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>=20
> diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c
> index e464784..0a688da 100644
> --- a/drivers/pwm/pwm-tegra.c
> +++ b/drivers/pwm/pwm-tegra.c
> @@ -85,8 +85,7 @@ static int tegra_pwm_config(struct pwm_chip *chip, stru=
ct pwm_device *pwm,
>  	 * nearest integer during division.
>  	 */
>  	c *=3D (1 << PWM_DUTY_WIDTH);
> -	c +=3D period_ns / 2;
> -	do_div(c, period_ns);
> +	c =3D DIV_ROUND_CLOSEST_ULL(c, period_ns);
> =20
>  	val =3D (u32)c << PWM_DUTY_SHIFT;
> =20
> --=20
> 2.1.4
>=20

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