Message-ID: <1491774092.4166.195.camel@kernel.crashing.org>
Subject: Re: [PATCH v4 19/23] drivers/fsi: Add GPIO based FSI master
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Christopher Bostic <cbostic@linux.vnet.ibm.com>,
        Joel Stanley <joel@jms.id.au>
Cc: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
        Russell King <linux@armlinux.org.uk>, rostedt@goodmis.org,
        mingo@redhat.com, Greg KH <gregkh@linuxfoundation.org>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Andrew Jeffery <andrew@aj.id.au>,
        Alistair Popple <alistair@popple.id.au>,
        "Edward A . James" <eajames@us.ibm.com>, Jeremy Kerr <jk@ozlabs.org>
Date: Mon, 10 Apr 2017 07:41:32 +1000
In-Reply-To: <5344146a-f450-7959-4688-a83ee022574b@linux.vnet.ibm.com>
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         <1490907014.3177.207.camel@kernel.crashing.org>
         <93b21624-11fc-b71b-aa78-6cb4371c87ae@linux.vnet.ibm.com>
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On Sun, 2017-04-09 at 16:22 -0500, Christopher Bostic wrote:
> A 3 microsecond delay is required, however, to prevent occasional issues 
> during heavy FSI bus load stress testing.
> A 1 nanosecond delay using ndelay(1) had been specified prior to this 
> but after looking more closely at real time performance it turned out to 
> actually be roughly 1-2 microseconds.   This appears to be the minimum 
> resolution using the delay() linux libraries on the AST2400/2500.   
> Given this, increasing delay to 3 microseconds doesn't impact 
> performance much considering I can now remove the sample input delay 
> based on your recommendations to re-order the two clock delays.

This is huge delays. We should consider a AST2xxx specific variant of
the backend that uses nops or similar lab-calibrated constructs
instead. Otherwise we are stuck in the kHz range, this is a >200Mhz bus
:)

I don't understand why 3us delay would thus be necessary.

Where about did you observe issues ? Could it be that you don't wait
long enough in the transitions from write to read ?

Cheers,
Ben.