Date: Sat, 31 May 2003 01:58:29 -0700 (PDT)
Message-Id: <20030531.015829.98871441.davem@redhat.com>
To: willy@w.ods.org
Cc: scrosby@cs.rice.edu, alexander.riesen@synopsys.COM,
       linux-kernel@vger.kernel.org, marcelo@conectiva.com.br
Subject: Re: Algoritmic Complexity Attacks and 2.4.20 the dcache code
From: "David S. Miller" <davem@redhat.com>
In-Reply-To: <20030531085612.GE21673@alpha.home.local>
References: <20030531080205.GA776@pcw.home.local>
	<20030531.011210.34750891.davem@redhat.com>
	<20030531085612.GE21673@alpha.home.local>
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   From: Willy Tarreau <willy@w.ods.org>
   Date: Sat, 31 May 2003 10:56:12 +0200

   Considering that the Alpha and the UltraSparc can issue up to 4
   instruction per cycle,

Ultrasparc only has 2 integer units.  So it really can only do 2
integer operations per cycle.  GCC is giving it an optimal schedule
for -mtune=ultrasparc, I know because I wrote that instruction
scheduler :-)

You can get 4 issue if you're doing floating point stuff.

I believe the current generation Alpha has 3 integer units.
GCC should be doing a good job there too.
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