Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752784AbdDKBvd (ORCPT ); Mon, 10 Apr 2017 21:51:33 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:41818 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751461AbdDKBvc (ORCPT ); Mon, 10 Apr 2017 21:51:32 -0400 From: Madhavan Srinivasan To: mpe@ellerman.id.au Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, benh@kernel.crashing.org, paulus@samba.org, sukadev@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, wangnan0@huawei.com, ast@kernel.org, eranian@google.com, Madhavan Srinivasan Subject: [PATCH v3 0/6] powerpc/perf: Export memory hierarchy level Date: Tue, 11 Apr 2017 07:21:04 +0530 X-Mailer: git-send-email 2.7.4 X-TM-AS-MML: disable x-cbid: 17041101-0012-0000-0000-000003DFF543 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17041101-0013-0000-0000-00001B666429 Message-Id: <1491875470-17904-1-git-send-email-maddy@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-11_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1704110014 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1892 Lines: 48 Power8/Power9 Perforence Monitoring Unit (PMU) supports different sampling modes (SM) such as Random Instruction Sampling (RIS), Random Load/Store Facility Sampling (RLS) and Random Branch Sampling (RBS). Sample mode RLS updates Sampled Instruction Event Register [SIER] bits with memory hierarchy information for a cache reload. Patchset exports the hierarchy information to the user via the perf_mem_data_src object from SIER. Patchset is a rebase of the work posted previously with minor updates to it. https://lkml.org/lkml/2015/6/11/92 Changelog v3: -Removed is_load_store() and merged the same to get_memdata_src callback -Added a check to update OP_LOAD or OP_STORE in data_src->val Changelog v2: -Updated the commit messages -Fixed isa207_find_source() to consider all the possible sier[ldst] values. Changelog v1: - Fixed author-ship for the first patch and added suka's "Signed-off-by:". Madhavan Srinivasan (5): powerpc/perf: Export memory hierarchy info to user space powerpc/perf: Support to export MMCRA[TEC*] field to userspace powerpc/perf: Support to export SIERs bit in Power8 powerpc/perf: Support to export SIERs bit in Power9 powerpc/perf: Add Power8 mem_access event to sysfs Sukadev Bhattiprolu (1): powerpc/perf: Define big-endian version of perf_mem_data_src arch/powerpc/include/asm/perf_event_server.h | 3 + arch/powerpc/perf/core-book3s.c | 8 +++ arch/powerpc/perf/isa207-common.c | 82 ++++++++++++++++++++++++++++ arch/powerpc/perf/isa207-common.h | 26 ++++++++- arch/powerpc/perf/power8-events-list.h | 6 ++ arch/powerpc/perf/power8-pmu.c | 4 ++ arch/powerpc/perf/power9-pmu.c | 2 + include/uapi/linux/perf_event.h | 16 ++++++ tools/include/uapi/linux/perf_event.h | 16 ++++++ 9 files changed, 162 insertions(+), 1 deletion(-) -- 2.7.4