Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752728AbdDKSDB (ORCPT ); Tue, 11 Apr 2017 14:03:01 -0400 Received: from mail.kernel.org ([198.145.29.136]:49760 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751992AbdDKSC6 (ORCPT ); Tue, 11 Apr 2017 14:02:58 -0400 MIME-Version: 1.0 In-Reply-To: <20170402144146.GA30775@tyrael.amer.corp.natinst.com> References: <1490875696-15145-1-git-send-email-hao.wu@intel.com> <1490875696-15145-2-git-send-email-hao.wu@intel.com> <20170401111619.GB4804@hao-dev> <20170402144146.GA30775@tyrael.amer.corp.natinst.com> From: Alan Tull Date: Tue, 11 Apr 2017 13:02:08 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview To: Moritz Fischer Cc: Wu Hao , matthew.gerlach@linux.intel.com, Moritz Fischer , linux-fpga@vger.kernel.org, linux-kernel , "Kang, Luwei" , "Zhang, Yi Z" , Enno Luebbers , Xiao Guangrong Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4870 Lines: 107 On Sun, Apr 2, 2017 at 9:41 AM, Moritz Fischer wrote: > On Sat, Apr 01, 2017 at 07:16:19PM +0800, Wu Hao wrote: >> On Fri, Mar 31, 2017 at 01:38:06PM -0500, Alan Tull wrote: >> > On Fri, Mar 31, 2017 at 1:24 PM, wrote: >> > > >> > > >> > > On Thu, 30 Mar 2017, Wu Hao wrote: >> > > >> > > >> > > Hi Wu Hao, >> > > >> > > Great documentation. I'm looking forward to diving into the rest of the >> > > patches. Please see my comments inline. >> > > >> > > Matthew Gerlach >> > > >> > > >> > >> Add a document for Intel FPGA driver overview. >> > >> >> > >> Signed-off-by: Enno Luebbers >> > >> Signed-off-by: Xiao Guangrong >> > >> Signed-off-by: Wu Hao >> > >> --- >> > >> Documentation/fpga/intel-fpga.txt | 259 >> > >> ++++++++++++++++++++++++++++++++++++++ >> > >> 1 file changed, 259 insertions(+) >> > >> create mode 100644 Documentation/fpga/intel-fpga.txt >> > >> >> > >> diff --git a/Documentation/fpga/intel-fpga.txt >> > >> b/Documentation/fpga/intel-fpga.txt >> > >> new file mode 100644 >> > >> index 0000000..9396cea >> > >> --- /dev/null >> > >> +++ b/Documentation/fpga/intel-fpga.txt >> > >> @@ -0,0 +1,259 @@ >> > >> >> > >> +=============================================================================== >> > >> + Intel FPGA driver Overview >> > >> >> > >> +------------------------------------------------------------------------------- >> > >> + Enno Luebbers >> > >> + Xiao Guangrong >> > >> + Wu Hao >> > >> + >> > >> +The Intel FPGA driver provides interfaces for userspace applications to >> > >> +configure, enumerate, open, and access FPGA accelerators on platforms >> > >> equipped >> > >> +with Intel(R) FPGA solutions and enables system level management >> > >> functions such >> > >> +as FPGA reconfiguration, power management, and virtualization. >> > >> + >> > > >> > > >> > > From a Linux kernel perspective, I'm not sure this is the best name for >> > > this code. The name gives me the impression that it is a driver for all >> > > Intel FPGAs, but not all Intel FPGAs are connected to the processor over a >> > > PCIe bus. The processor could be directely connected like the Arria10 >> > > SOCFPGA. Such a processor could certainly benefit from this accelerator >> > > usage model. In an extreme case, couldn't a processor in the FPGA, >> > > running Linux, also benefit from this accelerator model? Is this code a >> > > "FPGA Accelerator Framework"? >> > > >> > >> +HW Architecture >> > >> +=============== >> > >> +From the OS's point of view, the FPGA hardware appears as a regular PCIe >> > >> device. >> > >> +The FPGA device memory is organized using a predefined data structure >> > >> (Device >> > >> +Feature List). Features supported by the particular FPGA device are >> > >> exposed >> > >> +through these data structures, as illustrated below: >> > >> + >> > >> + +-------------------------------+ +-------------+ >> > >> + | PF | | VF | >> > >> + +-------------------------------+ +-------------+ >> > >> + ^ ^ ^ ^ >> > >> + | | | | >> > >> ++-----|------------|---------|--------------|-------+ >> > >> +| | | | | | >> > >> +| +-----+ +-------+ +-------+ +-------+ | >> > >> +| | FME | | Port0 | | Port1 | | Port2 | | >> > >> +| +-----+ +-------+ +-------+ +-------+ | >> > >> +| ^ ^ ^ | >> > >> +| | | | | >> > >> +| +-------+ +------+ +-------+ | >> > >> +| | AFU | | AFU | | AFU | | >> > >> +| +-------+ +------+ +-------+ | >> > >> +| | >> > >> +| FPGA PCIe Device | >> > >> ++---------------------------------------------------+ >> > >> + >> > >> +The driver supports PCIe SR-IOV to create virtual functions (VFs) which >> > >> can be >> > >> +used to assign individual accelerators to virtual machines . >> > > >> > > >> > > Does this HW Architecture require an Intel FPGA? Couldn't any vendors FPGA >> > > be used as long as it presented itself the PCIe bus the same and contained >> > > an appropriate Device Feature List? > > I think this is a good (and important) point. Especially when sysfs > entries & ioctls constituting ABI depend on it. Please cc linux-api@vger.kernel.org on your next version of this as linux/Documentation/process/adding-syscalls.rst specifies for new system calls. Alan