Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753358AbdDKXX3 (ORCPT ); Tue, 11 Apr 2017 19:23:29 -0400 Received: from mail-oi0-f41.google.com ([209.85.218.41]:32942 "EHLO mail-oi0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752776AbdDKXXV (ORCPT ); Tue, 11 Apr 2017 19:23:21 -0400 MIME-Version: 1.0 In-Reply-To: <20170411025956.GA9067@b29396-OptiPlex-7040> References: <20170330005029.6472-1-stefan@agner.ch> <20170330005029.6472-2-stefan@agner.ch> <20170401030312.GB24882@b29396-OptiPlex-7040> <5c8339900fa1bd6215fb94d4386f7e06@agner.ch> <20170411025956.GA9067@b29396-OptiPlex-7040> From: Fabio Estevam Date: Tue, 11 Apr 2017 20:23:19 -0300 Message-ID: Subject: Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances To: Dong Aisheng Cc: Stefan Agner , Shawn Guo , Sascha Hauer , Stephen Boyd , Dong Aisheng , Fabio Estevam , "robh+dt@kernel.org" , Mark Rutland , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , linux-clk@vger.kernel.org, linux-kernel Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 733 Lines: 16 On Mon, Apr 10, 2017 at 11:59 PM, Dong Aisheng wrote: > This is caused by ahb_root_clk gets disabled accidently and system hangs. > > Because this patch defines ipg_root_clk earlier before its parent > (ahb_root_clk) got registered, then it will be marked as a orphan clk > temporarily. Until the parent ahb_root_clk got registered, the clk core > will reparent it to the newly found parent. (see __clk_core_init() function). > > Due to CLK_SET_RATE_PARENT flag, the ahb clk will be enabled during > set_parent operation and then disabled after that. > Then system hang cause we still get no chance to run init_on clks. > > I just send out a proper fix patch with correct register sequence. Excellent, thanks!