Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753628AbdDLLqq (ORCPT ); Wed, 12 Apr 2017 07:46:46 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:48414 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753447AbdDLLqm (ORCPT ); Wed, 12 Apr 2017 07:46:42 -0400 From: "Gautham R. Shenoy" To: Michael Ellerman , Michael Neuling , Benjamin Herrenschmidt , "Shreyas B. Prabhu" , Shilpasri G Bhat , Vaidyanathan Srinivasan , Anton Blanchard , Balbir Singh , Akshay Adiga , Nicholas Piggin , Mahesh J Salgaonkar , "Aneesh Kumar K.V" Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, "Gautham R. Shenoy" Subject: [PATCH 1/3] powernv:idle: Use correct IDLE_THREAD_BITS in POWER8/9 Date: Wed, 12 Apr 2017 17:16:20 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 17041211-0052-0000-0000-000001D3987F X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006922; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000208; SDB=6.00846487; UDB=6.00417537; IPR=6.00624923; BA=6.00005286; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00015020; XFM=3.00000013; UTC=2017-04-12 11:46:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17041211-0053-0000-0000-00004FE23E95 Message-Id: <1b89d07b1a7ea140501a86b1ed246c5af1b0ce83.1491996797.git.ego@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-12_08:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1704120098 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2615 Lines: 73 From: "Gautham R. Shenoy" This patch ensures that POWER8 and POWER9 processors use the correct value of IDLE_THREAD_BITS as POWER8 has 8 threads per core and hence the IDLE_THREAD_BITS should be 0xFF while POWER9 has only 4 threads per core and hence the IDLE_THREAD_BITS should be 0xF. Signed-off-by: Gautham R. Shenoy --- arch/powerpc/include/asm/cpuidle.h | 3 ++- arch/powerpc/kernel/idle_book3s.S | 9 ++++++--- arch/powerpc/platforms/powernv/idle.c | 5 ++++- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h index 52586f9..fece6ca 100644 --- a/arch/powerpc/include/asm/cpuidle.h +++ b/arch/powerpc/include/asm/cpuidle.h @@ -34,7 +34,8 @@ #define PNV_CORE_IDLE_THREAD_WINKLE_BITS_SHIFT 8 #define PNV_CORE_IDLE_THREAD_WINKLE_BITS 0x0000FF00 -#define PNV_CORE_IDLE_THREAD_BITS 0x000000FF +#define PNV_CORE_IDLE_4THREAD_BITS 0x0000000F +#define PNV_CORE_IDLE_8THREAD_BITS 0x000000FF /* * ============================ NOTE ================================= diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S index 2b13fe2..9b747e9 100644 --- a/arch/powerpc/kernel/idle_book3s.S +++ b/arch/powerpc/kernel/idle_book3s.S @@ -223,7 +223,7 @@ lwarx_loop1: add r15,r15,r5 /* Add if winkle */ andc r15,r15,r7 /* Clear thread bit */ - andi. r9,r15,PNV_CORE_IDLE_THREAD_BITS + andi. r9,r15,PNV_CORE_IDLE_8THREAD_BITS /* * If cr0 = 0, then current thread is the last thread of the core entering @@ -582,8 +582,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) stwcx. r15,0,r14 bne- 1b isync - - andi. r9,r15,PNV_CORE_IDLE_THREAD_BITS +BEGIN_FTR_SECTION + andi. r9,r15,PNV_CORE_IDLE_4THREAD_BITS +FTR_SECTION_ELSE + andi. r9,r15,PNV_CORE_IDLE_8THREAD_BITS +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) cmpwi cr2,r9,0 /* diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 445f30a..d46920b 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -112,7 +112,10 @@ static void pnv_alloc_idle_core_states(void) size_t paca_ptr_array_size; core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node); - *core_idle_state = PNV_CORE_IDLE_THREAD_BITS; + if (cpu_has_feature(CPU_FTR_ARCH_300)) + *core_idle_state = PNV_CORE_IDLE_4THREAD_BITS; + else + *core_idle_state = PNV_CORE_IDLE_8THREAD_BITS; paca_ptr_array_size = (threads_per_core * sizeof(struct paca_struct *)); -- 1.9.4