Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753701AbdDLPtW (ORCPT ); Wed, 12 Apr 2017 11:49:22 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:35734 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752413AbdDLPtU (ORCPT ); Wed, 12 Apr 2017 11:49:20 -0400 Date: Wed, 12 Apr 2017 16:49:09 +0100 From: Mark Brown To: Dong Aisheng Cc: Dong Aisheng , linux-kernel@vger.kernel.org, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, lgirdwood@gmail.com, yibin.gong@nxp.com, Richard Zhu Message-ID: <20170412154909.hhv3kexadbqsekkr@sirena.org.uk> References: <1491962327-12477-1-git-send-email-aisheng.dong@nxp.com> <1491962327-12477-6-git-send-email-aisheng.dong@nxp.com> <20170411204003.avoe5a6o52kx5on2@sirena.org.uk> <20170413074103.GC23163@b29396-OptiPlex-7040> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="65j3re7nompjydcp" Content-Disposition: inline In-Reply-To: <20170413074103.GC23163@b29396-OptiPlex-7040> X-Cookie: We just joined the civil hair patrol! User-Agent: NeoMutt/20170306 (1.8.0) X-SA-Exim-Connect-IP: 2001:470:1f1d:6b5::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [PATCH 6/6] regulator: anatop: set default voltage selector for pcie X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1453 Lines: 45 --65j3re7nompjydcp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Apr 13, 2017 at 03:41:03PM +0800, Dong Aisheng wrote: > On Tue, Apr 11, 2017 at 09:40:03PM +0100, Mark Brown wrote: > > Why is this the only anatop regulator which can have this problem and > > how do we know this is a good value? > Anatop regulator has no separate gate bit. > e.g. > 00000 Power gated off > 00001 Target core voltage = 0.725V > ... > So it may have no valid default voltage in case it's disabled in > bootloader. > e.g. regulator_enable() may not work. That doesn't answer my question. What I'm asking is why another anatop regulator might not end up disabled like this one. > The default voltage 1.100v this patch sets is defined in reference > manual. For the SoC you're currently looking at... might another have a different value? --65j3re7nompjydcp Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAljuTHQACgkQJNaLcl1U h9CPRQf+NM8DL1jrPZRfOSQh6VT+iDuAIlu5oWjRRivtJiJamm/2I0NIlFsaah4h wooAd+4n6gILDrTdTGMSFuQQgE92YpBr3VOoTQRteiP7cN9vC7oA1KVrxj7deZfp 3DI31mOeQ+VcFsRpzbc2DniKVaQQXZGO88wCNzf6j5qYyTxifck+mkArJMcNR4a1 9+fJ6DsXnWp9V+fB0cGnA6FXyfA4nFE/T0+We2ko+DChvrKluLhh9h3iwp8tIABq A7znIAEDupgWpwjJn4FhNBDV8YBtass3jpN/7zrfS6mt0WYPOKbdnwMmuHA4hEBe whpQCt35e1Wr9LntAG/OPWxxM72k3A== =IgbX -----END PGP SIGNATURE----- --65j3re7nompjydcp--