Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756154AbdDMG7I (ORCPT ); Thu, 13 Apr 2017 02:59:08 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:40653 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751159AbdDMG7F (ORCPT ); Thu, 13 Apr 2017 02:59:05 -0400 Subject: Re: [PATCH v3] powerpc: mm: support ARCH_MMAP_RND_BITS To: Bhupesh Sharma References: <1490730347-5165-1-git-send-email-bhsharma@redhat.com> <87shlcq0es.fsf@skywalker.in.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org, kernel-hardening@lists.openwall.com, linux-kernel@vger.kernel.org, Alistair Popple , Anatolij Gustschin , Kees Cook , Daniel Cashman , Scott Wood , Paul Mackerras , Daniel Cashman , Bhupesh SHARMA , Alexander Graf From: "Aneesh Kumar K.V" Date: Thu, 13 Apr 2017 12:28:42 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 17041306-0020-0000-0000-00000BBFFFB8 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006927; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000208; SDB=6.00846870; UDB=6.00417767; IPR=6.00625303; BA=6.00005286; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00015028; XFM=3.00000013; UTC=2017-04-13 06:59:03 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17041306-0021-0000-0000-00005BA18523 Message-Id: <03284709-498c-1e52-40f0-b19d20e56b8e@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-13_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=2 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1704130058 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2579 Lines: 67 On Thursday 13 April 2017 12:22 PM, Bhupesh Sharma wrote: > Hi Aneesh, > > On Thu, Apr 13, 2017 at 12:06 PM, Aneesh Kumar K.V > wrote: >> Bhupesh Sharma writes: >> >>> powerpc arch_mmap_rnd() currently uses hard-coded values - (23-PAGE_SHIFT) for >>> 32-bit and (30-PAGE_SHIFT) for 64-bit, to generate the random offset >>> for the mmap base address for a ASLR ELF. >>> >>> This patch makes sure that powerpc mmap arch_mmap_rnd() implementation >>> is similar to other ARCHs (like x86, arm64) and uses mmap_rnd_bits >>> and helpers to generate the mmap address randomization. >>> >>> The maximum and minimum randomization range values represent >>> a compromise between increased ASLR effectiveness and avoiding >>> address-space fragmentation. >>> >>> Using the Kconfig option and suitable /proc tunable, platform >>> developers may choose where to place this compromise. >>> >>> Also this patch keeps the default values as new minimums. >>> >>> Signed-off-by: Bhupesh Sharma >>> Reviewed-by: Kees Cook >>> --- >>> * Changes since v2: >>> v2 can be seen here (https://patchwork.kernel.org/patch/9551509/) >>> - Changed a few minimum and maximum randomization ranges as per Michael's suggestion. >>> - Corrected Kees's email address in the Reviewed-by line. >>> - Added further comments in kconfig to explain how the address ranges were worked out. >>> >>> * Changes since v1: >>> v1 can be seen here (https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-February/153594.html) >>> - No functional change in this patch. >>> - Dropped PATCH 2/2 from v1 as recommended by Kees Cook. >>> >>> arch/powerpc/Kconfig | 44 ++++++++++++++++++++++++++++++++++++++++++++ >>> arch/powerpc/mm/mmap.c | 7 ++++--- >>> 2 files changed, 48 insertions(+), 3 deletions(-) >>> >>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig >>> index 97a8bc8..84aae67 100644 >>> --- a/arch/powerpc/Kconfig >>> +++ b/arch/powerpc/Kconfig >>> @@ -22,6 +22,48 @@ config MMU >>> bool >>> default y >>> >>> +# min bits determined by the following formula: >>> +# VA_BITS - PAGE_SHIFT - CONSTANT >>> +# where, >>> +# VA_BITS = 46 bits for 64BIT and 4GB - 1 Page = 31 bits for 32BIT >> >> >> Where did we derive that 46 bits from ? is that based on TASK_SIZE ? > > Yes. It was derived from TASK_SIZE : > http://lxr.free-electrons.com/source/arch/powerpc/include/asm/processor.h#L105 > That is getting update to 128TB by default and conditionally to 512TB -aneesh