Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754032AbdDNOd4 (ORCPT ); Fri, 14 Apr 2017 10:33:56 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:34695 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751960AbdDNOdu (ORCPT ); Fri, 14 Apr 2017 10:33:50 -0400 MIME-Version: 1.0 In-Reply-To: <20170414032853.GF14915@dragon> References: <20170413133242.5068-1-andrew.smirnov@gmail.com> <20170413133242.5068-4-andrew.smirnov@gmail.com> <20170414032853.GF14915@dragon> From: Andrey Smirnov Date: Fri, 14 Apr 2017 07:33:49 -0700 Message-ID: Subject: Re: [PATCH 3/8] ARM: dts: imx7s: Adjust anatop-enable-bit for 'reg_1p0d' To: Shawn Guo Cc: Andrey Yurovsky , Sascha Hauer , Fabio Estevam , Rob Herring , Mark Rutland , Russell King , devicetree@vger.kernel.org, linux-kernel , linux-arm-kernel Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1543 Lines: 35 On Thu, Apr 13, 2017 at 8:28 PM, Shawn Guo wrote: > On Thu, Apr 13, 2017 at 06:32:37AM -0700, Andrey Smirnov wrote: >> In PMU_REG_1P0Dn ENABLE_LINREG is bit 0. Bit 31 is called OVERRIDE and >> it serves the function of granting permission to GPC IP block to alter >> various bit-fields of the register. The reason why this property, that >> trickeld here from Freescale BSP, is set to 31 is because in the code >> it came from it is used in conjunction with a notifier handler for >> REGULATOR_EVENT_PRE_DO_ENABLE and REGULATOR_EVENT_PRE_DO_DISABLE >> events (not found in upstream kernel) that triggers GPC to start >> manipulating aforementioned other bitfields. >> >> Since: >> a) none of the aforementioned machinery is implemented by >> upstream >> b) using 'anatop-enable-bit' in that capacity is a bit of a >> semantic stretch >> >> simplify the situation by setting the value of 'anatop-enable-bit' to >> point to ENABLE_LINREG (same as i.MX6). >> >> Cc: yurovsky@gmail.com >> Cc: Sascha Hauer >> Cc: Fabio Estevam >> Cc: Rob Herring >> Cc: Mark Rutland >> Cc: Russell King >> Cc: devicetree@vger.kernel.org >> Cc: linux-kernel@vger.kernel.org >> Cc: linux-arm-kernel@lists.infradead.org >> Signed-off-by: Andrey Smirnov > > Since patch 1 ~ 3 are all about adding anatop-enable-bit, can we squash > them into one patch? OK. Will do in v2.