Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965970AbdDSQTH (ORCPT ); Wed, 19 Apr 2017 12:19:07 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48092 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965652AbdDSQTC (ORCPT ); Wed, 19 Apr 2017 12:19:02 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F15B360D3A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Wed, 19 Apr 2017 09:19:00 -0700 From: Stephen Boyd To: Mars Cheng Cc: Matthias Brugger , CC Hwang , Loda Chou , Miles Chen , Jades Shih , Yingjoe Chen , Kevin-CW Chen , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wsd_upstream@mediatek.com Subject: Re: [PATCH v4 05/10] clk: mediatek: add clk support for MT6797 Message-ID: <20170419161900.GC7065@codeaurora.org> References: <1491614435-23754-1-git-send-email-mars.cheng@mediatek.com> <1491614435-23754-6-git-send-email-mars.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1491614435-23754-6-git-send-email-mars.cheng@mediatek.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 532 Lines: 17 On 04/08, Mars Cheng wrote: > From: Kevin-CW Chen > > Add MT6797 clock support, include topckgen, apmixedsys, infracfg > and subsystem clocks > > Signed-off-by: Kevin-CW Chen > Signed-off-by: Mars Cheng > Tested-by: Matthias Brugger > Acked-by: Stephen Boyd > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project