Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968100AbdDSUvm (ORCPT ); Wed, 19 Apr 2017 16:51:42 -0400 Received: from mail-bl2nam02on0047.outbound.protection.outlook.com ([104.47.38.47]:35136 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S969371AbdDSUtF (ORCPT ); Wed, 19 Apr 2017 16:49:05 -0400 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; From: Roy Pledge To: , , , , CC: , Roy Pledge Subject: [PATCH v2 07/11] soc/fsl/qbman: Rework ioremap() calls for ARM/PPC Date: Wed, 19 Apr 2017 16:48:46 -0400 Message-ID: <1492634930-10765-8-git-send-email-roy.pledge@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492634930-10765-1-git-send-email-roy.pledge@nxp.com> References: <1492634930-10765-1-git-send-email-roy.pledge@nxp.com> Reply-To: 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The PPC devices require a non-coherent mapping while ARM will work with a non-cachable/write combine mapping. Signed-off-by: Roy Pledge --- drivers/soc/fsl/qbman/bman_portal.c | 16 +++++++++++++--- drivers/soc/fsl/qbman/qman_portal.c | 16 +++++++++++++--- 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/soc/fsl/qbman/bman_portal.c b/drivers/soc/fsl/qbman/bman_portal.c index 8354d4d..a661f30 100644 --- a/drivers/soc/fsl/qbman/bman_portal.c +++ b/drivers/soc/fsl/qbman/bman_portal.c @@ -125,7 +125,18 @@ static int bman_portal_probe(struct platform_device *pdev) } pcfg->irq = irq; - va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0); +#ifdef CONFIG_PPC + /* PPC requires a cacheable/non-coherent mapping of the portal */ + va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), + (pgprot_val(PAGE_KERNEL) & ~_PAGE_COHERENT)); +#else + /* + * For ARM we can use write combine mapping. A cacheable/non shareable + * mapping will perform better but equires additional platform + * support which is not currently available + */ + va = ioremap_wc(addr_phys[0]->start, resource_size(addr_phys[0])); +#endif if (!va) { dev_err(dev, "ioremap::CE failed\n"); goto err_ioremap1; @@ -133,8 +144,7 @@ static int bman_portal_probe(struct platform_device *pdev) pcfg->addr_virt[DPAA_PORTAL_CE] = va; - va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]), - _PAGE_GUARDED | _PAGE_NO_CACHE); + va = ioremap(addr_phys[1]->start, resource_size(addr_phys[1])); if (!va) { dev_err(dev, "ioremap::CI failed\n"); goto err_ioremap2; diff --git a/drivers/soc/fsl/qbman/qman_portal.c b/drivers/soc/fsl/qbman/qman_portal.c index adbaa30..e7a9eef 100644 --- a/drivers/soc/fsl/qbman/qman_portal.c +++ b/drivers/soc/fsl/qbman/qman_portal.c @@ -265,7 +265,18 @@ static int qman_portal_probe(struct platform_device *pdev) } pcfg->irq = irq; - va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0); +#ifdef CONFIG_PPC + /* PPC requires a cacheable/non-coherent mapping of the portal */ + va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), + (pgprot_val(PAGE_KERNEL) & ~_PAGE_COHERENT)); +#else + /* + * For ARM we can use write combine mapping. A cacheable/non shareable + * mapping will perform better but equires additional platform + * support which is not currently available + */ + va = ioremap_wc(addr_phys[0]->start, resource_size(addr_phys[0])); +#endif if (!va) { dev_err(dev, "ioremap::CE failed\n"); goto err_ioremap1; @@ -273,8 +284,7 @@ static int qman_portal_probe(struct platform_device *pdev) pcfg->addr_virt[DPAA_PORTAL_CE] = va; - va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]), - _PAGE_GUARDED | _PAGE_NO_CACHE); + va = ioremap(addr_phys[1]->start, resource_size(addr_phys[1])); if (!va) { dev_err(dev, "ioremap::CI failed\n"); goto err_ioremap2; -- 2.7.4