Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S970984AbdDTQJ2 (ORCPT ); Thu, 20 Apr 2017 12:09:28 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:35767 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S971017AbdDTQIY (ORCPT ); Thu, 20 Apr 2017 12:08:24 -0400 From: Hugues Fruchet To: Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Mauro Carvalho Chehab , Hans Verkuil CC: , , , , Benjamin Gaignard , Yannick Fertre , Hugues Fruchet Subject: [PATCH v4 3/8] ARM: dts: stm32: Enable DCMI support on STM32F429 MCU Date: Thu, 20 Apr 2017 18:07:20 +0200 Message-ID: <1492704445-22186-4-git-send-email-hugues.fruchet@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1492704445-22186-1-git-send-email-hugues.fruchet@st.com> References: <1492704445-22186-1-git-send-email-hugues.fruchet@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.73] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-20_15:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1745 Lines: 64 Enable DCMI camera interface on STM32F429 MCU. Signed-off-by: Hugues Fruchet --- arch/arm/boot/dts/stm32f429.dtsi | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index ee0da97..e1ff978 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -736,6 +736,29 @@ slew-rate = <3>; }; }; + + dcmi_pins: dcmi_pins@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + }; }; rcc: rcc@40023810 { @@ -805,6 +828,20 @@ status = "disabled"; }; + dcmi: dcmi@50050000 { + compatible = "st,stm32-dcmi"; + reg = <0x50050000 0x400>; + interrupts = <78>; + resets = <&rcc STM32F4_AHB2_RESET(DCMI)>; + clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&dcmi_pins>; + dmas = <&dma2 1 1 0x414 0x3>; + dma-names = "tx"; + status = "disabled"; + }; + rng: rng@50060800 { compatible = "st,stm32-rng"; reg = <0x50060800 0x400>; -- 1.9.1