Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S971096AbdDTQSE (ORCPT ); Thu, 20 Apr 2017 12:18:04 -0400 Received: from mail-sn1nam02on0045.outbound.protection.outlook.com ([104.47.36.45]:2275 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S970943AbdDTQRb (ORCPT ); Thu, 20 Apr 2017 12:17:31 -0400 Authentication-Results: caviumnetworks.com; dkim=none (message not signed) header.d=none;caviumnetworks.com; dmarc=none action=none header.from=cavium.com; Subject: Re: MMC block addressing mode. To: Ulf Hansson References: Cc: linux-mmc , "linux-kernel@vger.kernel.org" , David Daney , Jan Glauber From: "Steven J. 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You previously suggested use >> of the 'blksz' value, however, it has the same value regardless of >> the card capacity. What would you suggest? Cheers. > > Right. Can you explain what the Cavium hardware need it for? > Uffe, In Cavium's MMC controller, the DMA engine requires software to specify the addressing mode of the card. For DMA write operations, the CARD_ADDR field in the MIO_EMM_DMA register is programmed with a byte address if the media card <= 2GB. If the card is > 2GB, the address is interpreted as a 512 byte sector address. The SECTOR bit tells the controller how to interpret the address in CARD_ADDR. If set to 1, use 512 byte sector addressing, otherwise it is set to 0 and byte addressing is used. Steve