Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1034001AbdDTVnI (ORCPT ); Thu, 20 Apr 2017 17:43:08 -0400 Received: from mail-out.m-online.net ([212.18.0.10]:52559 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033976AbdDTVnF (ORCPT ); Thu, 20 Apr 2017 17:43:05 -0400 X-Auth-Info: o4BBo7kT/3yDF1tbtLMyF6/3HgHDj+fpTsZUvHgN7z0= From: Anatolij Gustschin To: linux-fpga@vger.kernel.org Cc: Alan Tull , Moritz Fischer , linux-kernel@vger.kernel.org, Joshua Clayton Subject: [PATCH] fpga: Add flag to indicate SPI bitstream is bit-reversed Date: Thu, 20 Apr 2017 23:43:01 +0200 Message-Id: <1492724581-17034-1-git-send-email-agust@denx.de> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1418 Lines: 36 Add a flag that is passed to the write_init() callback, indicating that the SPI bitstream starts with LSB first. SPI controllers usually send data with MSB first. If an FPGA expects bitstream data as LSB first, the data must be reversed either by the SPI controller or by the driver. Alternatively the bitstream could be prepared as bit-reversed to avoid the bit-swapping while sending. This flag indicates such bit-reversed SPI bitstream. The low-level driver will deal with the flag and perform bit-reversing if needed. Signed-off-by: Anatolij Gustschin --- include/linux/fpga/fpga-mgr.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index b4ac24c..5a055a0 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,10 +67,13 @@ enum fpga_mgr_states { * FPGA Manager flags * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting + * FPGA_MGR_SPI_BITSTREAM_LSB_FIRST: SPI bitstream bit order is reversed to + * start with LSB first */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) +#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRST BIT(3) /** * struct fpga_image_info - information specific to a FPGA image -- 2.7.4