Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1040933AbdDUOZC (ORCPT ); Fri, 21 Apr 2017 10:25:02 -0400 Received: from userp1040.oracle.com ([156.151.31.81]:26919 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1040897AbdDUOZA (ORCPT ); Fri, 21 Apr 2017 10:25:00 -0400 Subject: Re: [PATCH v3 09/11] x86/xen: use capabilities instead of fake cpuid values for xsave To: Juergen Gross , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org References: <20170418063119.11654-1-jgross@suse.com> <20170418063119.11654-10-jgross@suse.com> From: Boris Ostrovsky Message-ID: Date: Fri, 21 Apr 2017 10:24:15 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170418063119.11654-10-jgross@suse.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 821 Lines: 29 > +static bool __init xen_check_xsave(void) > { > - unsigned int ax, bx, cx, dx; > - unsigned int xsave_mask; > + unsigned int err, eax, edx; > > - ax = 1; > - cx = 0; > - cpuid(1, &ax, &bx, &cx, &dx); > + /* Test OSXSAVE capability via xgetbv instruction. */ > + asm volatile("1: .byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ > + "xor %[err], %[err]\n" > + "2:\n\t" > + ".pushsection .fixup,\"ax\"\n\t" > + "3: movl $1,%[err]\n\t" > + "jmp 2b\n\t" > + ".popsection\n\t" > + _ASM_EXTABLE(1b, 3b) > + : [err] "=r" (err), "=a" (eax), "=d" (edx) > + : "c" (0)); Have you tested this on processors where we actually trap on xgetbv? I have an AMD box without XSAVE support and this is a fatal error. I suspect it's too early to use exception fixup framework here. -boris