Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1041135AbdDUOit (ORCPT ); Fri, 21 Apr 2017 10:38:49 -0400 Received: from mx2.suse.de ([195.135.220.15]:58524 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1038837AbdDUOio (ORCPT ); Fri, 21 Apr 2017 10:38:44 -0400 Subject: Re: [PATCH v3 09/11] x86/xen: use capabilities instead of fake cpuid values for xsave To: Boris Ostrovsky , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Andrew Cooper References: <20170418063119.11654-1-jgross@suse.com> <20170418063119.11654-10-jgross@suse.com> From: Juergen Gross Message-ID: <12028326-0f19-9430-d8b7-a376facf8749@suse.com> Date: Fri, 21 Apr 2017 16:38:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1016 Lines: 35 On 21/04/17 16:24, Boris Ostrovsky wrote: > >> +static bool __init xen_check_xsave(void) >> { >> - unsigned int ax, bx, cx, dx; >> - unsigned int xsave_mask; >> + unsigned int err, eax, edx; >> >> - ax = 1; >> - cx = 0; >> - cpuid(1, &ax, &bx, &cx, &dx); >> + /* Test OSXSAVE capability via xgetbv instruction. */ >> + asm volatile("1: .byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ >> + "xor %[err], %[err]\n" >> + "2:\n\t" >> + ".pushsection .fixup,\"ax\"\n\t" >> + "3: movl $1,%[err]\n\t" >> + "jmp 2b\n\t" >> + ".popsection\n\t" >> + _ASM_EXTABLE(1b, 3b) >> + : [err] "=r" (err), "=a" (eax), "=d" (edx) >> + : "c" (0)); > > Have you tested this on processors where we actually trap on xgetbv? > > I have an AMD box without XSAVE support and this is a fatal error. I > suspect it's too early to use exception fixup framework here. Uuh, too bad. Then I fear we must use the other solution Andrew didn't like. :-( Andrew, would you be okay with that? Juergen