Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1425006AbdDUTZu (ORCPT ); Fri, 21 Apr 2017 15:25:50 -0400 Received: from userp1050.oracle.com ([156.151.31.82]:30366 "EHLO userp1050.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1424953AbdDUTZq (ORCPT ); Fri, 21 Apr 2017 15:25:46 -0400 Subject: Re: [PATCH v3 09/11] x86/xen: use capabilities instead of fake cpuid values for xsave To: Andrew Cooper , Juergen Gross , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org References: <20170418063119.11654-1-jgross@suse.com> <20170418063119.11654-10-jgross@suse.com> <12028326-0f19-9430-d8b7-a376facf8749@suse.com> From: Boris Ostrovsky Message-ID: <11745477-7dbb-cc36-1d14-f6cac9b0d13b@oracle.com> Date: Fri, 21 Apr 2017 10:51:37 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Source-IP: userp1040.oracle.com [156.151.31.81] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1696 Lines: 46 On 04/21/2017 10:45 AM, Andrew Cooper wrote: > On 21/04/17 15:38, Juergen Gross wrote: >> On 21/04/17 16:24, Boris Ostrovsky wrote: >>>> +static bool __init xen_check_xsave(void) >>>> { >>>> - unsigned int ax, bx, cx, dx; >>>> - unsigned int xsave_mask; >>>> + unsigned int err, eax, edx; >>>> >>>> - ax = 1; >>>> - cx = 0; >>>> - cpuid(1, &ax, &bx, &cx, &dx); >>>> + /* Test OSXSAVE capability via xgetbv instruction. */ >>>> + asm volatile("1: .byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ >>>> + "xor %[err], %[err]\n" >>>> + "2:\n\t" >>>> + ".pushsection .fixup,\"ax\"\n\t" >>>> + "3: movl $1,%[err]\n\t" >>>> + "jmp 2b\n\t" >>>> + ".popsection\n\t" >>>> + _ASM_EXTABLE(1b, 3b) >>>> + : [err] "=r" (err), "=a" (eax), "=d" (edx) >>>> + : "c" (0)); >>> Have you tested this on processors where we actually trap on xgetbv? >>> >>> I have an AMD box without XSAVE support and this is a fatal error. I >>> suspect it's too early to use exception fixup framework here. >> Uuh, too bad. >> >> Then I fear we must use the other solution Andrew didn't like. :-( >> Andrew, would you be okay with that? > Hmm fine. The status quo is probably best then to unblock this series. > > As an independent question, why are exceptions set up so late? They > really should be the very first thing done It's exception fixup that is not set up yet --- we are executing here before "main" kernel's entry point. This is somewhat similar to what arch/x86/kernel/head_64.S:early_idt_handler_common() does --- it has special handling for early fixup --- early_fixup_exception(). I wonder though --- can this feature masking be deferred until a bit later? -boris