Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1426090AbdDUWMo (ORCPT ); Fri, 21 Apr 2017 18:12:44 -0400 Received: from mail-oi0-f66.google.com ([209.85.218.66]:35717 "EHLO mail-oi0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1426058AbdDUWMk (ORCPT ); Fri, 21 Apr 2017 18:12:40 -0400 MIME-Version: 1.0 In-Reply-To: <7eb9a87f-9b61-1367-311c-bc37430291e5@arm.com> References: <1489137839-549-1-git-send-email-vladimir.murzin@arm.com> <1489137839-549-7-git-send-email-vladimir.murzin@arm.com> <7eb9a87f-9b61-1367-311c-bc37430291e5@arm.com> From: Arnd Bergmann Date: Sat, 22 Apr 2017 00:12:39 +0200 X-Google-Sender-Auth: TWfWec5Pj5NrB2ipxITqkkYjg0g Message-ID: Subject: Re: [PATCH v3 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus To: Vladimir Murzin Cc: Linux ARM , Alexandre Torgue , Russell King - ARM Linux , Linux Kernel Mailing List , kbuild-all@01.org, Benjamin Gaignard , Andrew Morton , Robin Murphy , sza@esh.hu Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1219 Lines: 26 On Wed, Apr 19, 2017 at 4:10 PM, Vladimir Murzin wrote: > On 19/04/17 11:02, Arnd Bergmann wrote: >> Can you either modify the description to explain why we now need this on >> all ARMv7M, or add a '|| CPU_V7M' for the 'bool' line to make it optional? >> >> Would it be better to leave the default as disabled on CPU_V7M and >> require users to enable it manually? That way we don't regress the >> performance of readl/writel on platforms that don't need this. >> > > It is architectural vs implementation differences. Even though existing > implementations rarely need this sticking with architecture (it permits memory > re-ordering to happen in many cases) makes code more robust and save some > debugging time when more sophisticated implementations go wild (see, for > instance, 8e02676ffa69 "ARM: 8610/1: V7M: Add dsb before jumping in handler > mode"). We can consider making it user selectable if performance regressions > are reported. I would expect the performance difference to be noticeable, even though MMIO tends to be a rather slow operation, having tons of barriers in drivers that don't do DMA but transfer data through a series of writel() can be significant. Arnd